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參數(shù)資料
| 型號： | 935167560557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 20 X 2.70 MM, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 102/112頁 |
| 文件大?。?/td> | 707K |
| 代理商： | 935167560557 |
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1996 Jun 27
9
Philips Semiconductors
Product specication
8-bit microcontroller with on-chip CAN
P8xCE598
4. ALE is activated every six oscillator periods. During an external data memory access one ALE pulse is skipped.
5. See Section 7.1, Table 3 for EA operation. For P83CE598 microcontrollers specified with the option ‘ROM-code
protection’, the EA pin is latched during reset and is ‘don't care’ after reset, regardless of whether the ROM-code
protection is selected or not.
6. Pin 78, REF:
a) Selection of input respectively output dependent of CAN Control Register bit 5 (CR.5; see Section 13.5.3
Table 32).
b) If the internal reference is used, then REF should be connected to AVSS via a capacitor with a value of ≥ 10 nF.
c) After an external reset (RST = HIGH) the internal 1
2AVDD source is activated and, REF is a reference output.
d) If the CAN-controller is in the reset state, e.g. after an external reset, then the 1
2AVDD source is switched off
during Power-down mode.
7. CAN Bus line:
a) CRX0 level > CRX1 level is interpreted as a logic 1 (recessive).
b) CRX0 level < CRX1 level is interpreted as a logic 0 (dominant).
8. The level of AVREF+ must be higher than that of AVREF.
Table 2
Pin description for pins with alternative functions (SOT318-2 and SOT351-1; see note 1)
SYMBOL
PIN
DESCRIPTION
DEFAULT
ALTERNATIVE
Port 4
P4.0 to P4.7
19 to 22, 24 to 27
8-bit quasi-bidirectional I/O port.
CMSR0
19
Compare and Set/Reset outputs for Timer T2.
CMSR1
20
CMSR2
21
CMSR3
22
CMSR4
24
CMSR5
25
CMT0
26
Compare and toggle outputs for Timer T2.
CMT1
27
Port 1
P1.0 to P1.7
31 to 36, 38 to 39
8-bit quasi-bidirectional I/O port.
CT0I/INT2
31
Capture timer inputs for Timer T2,
or
External interrupt inputs 2to5.
CT1I/INT3
32
CT2I/INT4
33
CT3I/INT5
34
T2
35
T2 event input (rising edge triggered).
RT2
36
T2 timer reset input (rising edge triggered).
CTX0
38
CAN transmitter output 0 (note 2).
CTX1
39
CAN transmitter output 1 (note 2).
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