參數(shù)資料
型號(hào): 935167560557
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 16 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 20 X 2.70 MM, PLASTIC, QFP-80
文件頁數(shù): 43/112頁
文件大?。?/td> 707K
代理商: 935167560557
1996 Jun 27
36
Philips Semiconductors
Product specication
8-bit microcontroller with on-chip CAN
P8xCE598
13.5.4
COMMAND REGISTER (CMR)
A command bit initiates an action within the transfer layer of the CAN-controller. The Command Register appears to the
CPU as a read/write memory, except for the bits CMR.0 (TR) to CMR.3 (COS), which return a HIGH if being read.
Table 33 Command Register (address 1)
Table 34 Description of the CMR bits
76543210
RX0A
RX1A
WUM
SLP
COS
RRB
AT
TR
BIT
SYMBOL
FUNCTION
7
RX0A
RX0 Active. See Table 35; note 1.
6
RX1A
RX1 Active. See Table 35; note 1.
5
WUM
Wake-up Mode (note 2). If the value of WUM is:
HIGH (single ended), then the difference of the RX signals to the internal reference
voltage 1
2AVDD is used for wake up.
LOW (differential), then the differential signal between RX0 and RX1 is used for wake
up.
4
SLP
Sleep (note 3). If the value of SLP is:
HIGH (sleep), then the CAN-controller enters sleep mode if no CAN interrupt is
pending and there is no bus activity.
LOW (wake up), then the CAN-controller functions normally.
3
COS
Clear Overrun Status (note 4). If the value of COS is:
HIGH (clear), then the Data Overrun status bit is set to LOW (see Table 37).
LOW (no action), then there is no action.
2
RRB
Release Receive Buffer (note 5). If the value of RRB is:
HIGH (released), then the Receive Buffer attached to the CPU is released.
LOW (no action), then there is no action.
1AT
Abort Transmission (note 6). If the value of AT is:
HIGH (present) and if not already in progress, a pending Transmission Request is
cancelled.
LOW (absent), then there is no action.
0TR
Transmission Request (note 7). If the value of TR is:
HIGH (present), then a message shall be transmitted.
LOW (absent), then there is no action.
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