1998 Apr 09
6
Philips Semiconductors
Product specication
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
6
PINNING
Pin description for QFP160
SYMBOL
PIN
STATUS
DESCRIPTION
D1_A0
1
I/O
bidirectional digital CCIR 656 D1 port A bit 0
D1_A1
2
I/O
bidirectional digital CCIR 656 D1 port A bit 1
D1_A2
3
I/O
bidirectional digital CCIR 656 D1 port A bit 2
D1_A3
4
I/O
bidirectional digital CCIR 656 D1 port A bit 3
VDDD1
5
P
digital supply voltage 1 (3.3 V)
VSSD1
6
P
digital ground 1
D1_A4
7
I/O
bidirectional digital CCIR 656 D1 port A bit 4
D1_A5
8
I/O
bidirectional digital CCIR 656 D1 port A bit 5
D1_A6
9
I/O
bidirectional digital CCIR 656 D1 port A bit 6
D1_A7
10
I/O
bidirectional digital CCIR 656 D1 port A bit 7
VS_A
11
I/O
bidirectional vertical sync signal port A
HS_A
12
I/O
bidirectional horizontal sync signal port A
LLC_A
13
I/O
bidirectional line-locked system clock port A
PXQ_A
14
I/O
bidirectional pixel qualier signal to mark valid pixels port A; note 1
VDDD2
15
P
digital supply voltage 2 (3.3 V)
VSSD2
16
P
digital ground 2
TRST
17
I
test reset input (JTAG pin must be set LOW for normal operation)
TMS
18
I
test mode select input (JTAG pin must be oating or set to HIGH during normal
operation)
TCLK
19
I
test clock input (JTAG pin should be set LOW during normal operation)
TDO
20
O
test data output (JTAG pin not active during normal operation)
TDI
21
I
test data input (JTAG pin must be oating or set to HIGH during normal operation)
VDDD3
22
P
digital supply voltage 3 (3.3 V)
VSSD3
23
P
digital ground 3
INTA#
24
O
PCI interrupt line output (active LOW)
RST
25
I
PCI global reset input (active LOW)
CLK
26
I
PCI clock input
GNT#
27
I
bus grant input signal, PCI arbitration signal (active LOW)
REQ#
28
O
bus request output signal, PCI arbitration signal (active LOW)
VDDD4
29
P
digital supply voltage 4 (3.3 V)
VSSD4
30
P
digital ground 4
AD PCI31
31
I/O
bidirectional PCI multiplexed address/data bit 31
AD PCI30
32
I/O
bidirectional PCI multiplexed address/data bit 30
AD PCI29
33
I/O
bidirectional PCI multiplexed address/data bit 29
AD PCI28
34
I/O
bidirectional PCI multiplexed address/data bit 28
VDDD5
35
P
digital supply voltage 5 (3.3 V)
VSSD5
36
P
digital ground 5
AD PCI27
37
I/O
bidirectional PCI multiplexed address/data bit 27