參數(shù)資料
型號： 935260698557
廠商： NXP SEMICONDUCTORS
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝： PLASTIC, SOT-322, QFP-160
文件頁數(shù)： 88/148頁
文件大?。?/td> 692K
代理商： 935260698557
1998 Apr 09
44
Philips Semiconductors
Product specication
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
7.4.8
RPS TIME OUT VALUE
These registers contain the values for the time out conditions of the PAUSE and CHECK_LATE commands for each task.
If the selected counter value is zero, the time out generation is disabled.
Table 36 RPS time out value
Table 37 RPS_TOX generation
OFFSET
(HEX)
NAME
BIT
TYPE
DESCRIPTION
D4
V_TO0
31
RW
these two bits determine how the RPS_TO0 is generated;
see Table 37
C_TO0
30
RW
V_ABN0
29
RW
this bit determines which port the V_sync for the time out check
comes from: a logic 1 selects Port A; a logic 0 selects Port B
28
reserved
Vsync_Cnt0
27 to 24
RW
this is a 4-bit value which sets the V_sync time out between
1 and 15 V_syncs
PCI_Cnt0
23 to 0
RW
this value species after how many PCI clocks a time out
should be detected
D8
V_TO1
31
RW
these two bits determine how the RPS_TO1 is generated;
see Table 37
C_TO1
30
RW
V_ABN1
29
RW
this bit determines which port the V_sync for the time out check
comes from: a logic 1 selects Port A; a logic 0 selects Port B
28
reserved
Vsync_Cnt1
27 to 24
RW
this is a 4-bit value which sets the V_sync time out between
1 and 15 V_syncs
PCI_Cnt1
23 to 0
RW
this value species after how many PCI clocks a time out
should be detected
V_TOX
C_TOX
RPS_TOX GENERATED FORMAT
0
no time out check
0
1
PCI clock time out check
1
0
V_sync time out check
1
both time out checks
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