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參數(shù)資料
| 型號： | 9S12D32DGV1 |
| 英文描述： | 9S12DGDJ64DGV1 Device Guide. also covers 9S12D64. 9S12A64. 9S12D32. and 9S12A32 devices |
| 中文描述： | 9S12DGDJ64DGV1設備指南。也包括9S12D64。 9S12A64。 9S12D32。和9S12A32設備 |
| 文件頁數(shù)： | 57/126頁 |
| 文件大?。?/td> | 1809K |
| 代理商： | 9S12D32DGV1 |
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MC9S12DJ64 Device User Guide — V01.17
57
2.3.14 PE6 / MODB / IPIPE1 — Port E I/O Pin 6
PE6 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.
The state of this pin is latched to the MODB bit at the rising edge of RESET. This pin is shared with the
instructionqueuetrackingsignalIPIPE1.Thispinisaninputwithapull-downdevicewhichisonlyactive
when RESET is low.
2.3.15 PE5 / MODA / IPIPE0 — Port E I/O Pin 5
PE5 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.
The state of this pin is latched to the MODA bit at the rising edge of RESET. This pin is shared with the
instructionqueuetrackingsignalIPIPE0.Thispinisaninputwithapull-downdevicewhichisonlyactive
when RESET is low.
2.3.16 PE4 / ECLK — Port E I/O Pin 4
PE4 is a general purpose input or output pin. It can be configured to drive the internal bus clock ECLK.
ECLK can be used as a timing reference.
2.3.17 PE3 / LSTRB / TAGLO — Port E I/O Pin 3
PE3 is a general purpose input or output pin. In MCU expanded modes of operation, LSTRB can be used
for the low-byte strobe function to indicate the type of bus access and when instruction tagging is on,
TAGLO is used to tag the low half of the instruction word being read into the instruction queue.
2.3.18 PE2 / R/W—Port E I/O Pin 2
PE2 is a general purpose input or output pin. In MCU expanded modes of operations, this pin drives the
read/write output signal for the external bus. It indicates the direction of data on the external bus.
2.3.19 PE1 / IRQ — Port E Input Pin 1
PE1 is a general purpose input pin and the maskable interrupt request input that provides a means of
applying asynchronous interrupt requests. This will wake up the MCU from STOP or WAIT mode.
2.3.20 PE0 / XIRQ — Port E Input Pin 0
PE0 is a general purpose input pin and the non-maskable interrupt request input that provides a means of
applying asynchronous interrupt requests. This will wake up the MCU from STOP or WAIT mode.
2.3.21 PH7 / KWH7 — Port H I/O Pin 7
PH7isageneralpurposeinputoroutputpin.ItcanbeconfiguredtogenerateaninterruptcausingtheMCU
to exit STOP or WAIT mode.
相關PDF資料 |
PDF描述 |
|---|---|
| 9S12DJ64DGV1 | 9S12DJ64DG Device Guide. also covers 9S12D64. 9S12A64. 9S12D32 and 9S12A32 devices |
| 9S12DJ64-ZIP_PART2 | MC9S12DJ64 Users Guides. zip format. part 2 |
| 9S12DP256BDGV2 | 9S12Dx256B Device Guide. also covers C derivatives and 9S12Ax256 devices |
| 9S12DP512DGV1 | 9S12Dx512 Device Guide |
| 9S12DT128BDGV1 | 9S12DT128B Device Guide |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 9S12DJ64DGV1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12DJ64DG Device Guide. also covers 9S12D64. 9S12A64. 9S12D32 and 9S12A32 devices |
| 9S12DP256BDGV1 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Automotive applications |
| 9S12DP256BDGV2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12Dx256B Device Guide. also covers C derivatives and 9S12Ax256 devices |
| 9S12DP512DGV1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12Dx512 Device Guide |
| 9S12DT128BDGV1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12DT128B Device Guide |
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