參數(shù)資料
型號： 9S12D32DGV1
英文描述： 9S12DGDJ64DGV1 Device Guide. also covers 9S12D64. 9S12A64. 9S12D32. and 9S12A32 devices
中文描述： 9S12DGDJ64DGV1設備指南。也包括9S12D64。 9S12A64。 9S12D32。和9S12A32設備
文件頁數(shù)： 69/126頁
文件大?。?/td> 1809K
代理商： 9S12D32DGV1
MC9S12DJ64 Device User Guide — V01.17
69
4.3.2.2 Executing from External Memory
The user may wish to execute from external space with a secured microcontroller. This is accomplished
by resetting directly into expanded mode. The internal FLASH and EEPROM will be disabled. BDM
operations will be blocked.
4.3.3 Unsecuring the Microcontroller
In order to unsecure the microcontroller, the internal FLASH and EEPROM must be erased. This can be
done through an external program in expanded mode or via a sequence of BDM commands. Unsecuring
is also possible via the Backdoor Key Access. Refer to Flash Block Guide for details.
Once the user has erased the FLASH and EEPROM, the part can be reset into special single chip mode.
This invokes a program that verifies the erasure of the internal FLASH and EEPROM. Once this program
completes,theusercaneraseandprogramtheFLASHsecuritybitstotheunsecuredstate.Thisisgenerally
done through the BDM, but the user could also change to expanded mode (by writing the mode bits
through the BDM) and jumping to an external program (again through BDM commands). Note that if the
part goes through a reset before the security bits are reprogrammed to the unsecure state, the part will be
secured again.
4.4 Low Power Modes
The microcontroller features three main low power modes. Consult the respective Block User Guide for
information on the module behavior in Stop, Pseudo Stop, and Wait Mode. An important source of
information about the clock system is the Clock and Reset Generator User Guide (CRG).
4.4.1 Stop
Executing the CPU STOP instruction stops all clocks and the oscillator thus putting the chip in fully static
mode. Wake up from this mode can be done via reset or external interrupts.
4.4.2 Pseudo Stop
This mode is entered by executing the CPU STOP instruction. In this mode the oscillator is still running
and the Real Time Interrupt (RTI) or Watchdog (COP) sub module can stay active. Other peripherals are
turned off. This mode consumes more current than the full STOP mode, but the wake up time from this
mode is significantly shorter.
4.4.3 Wait
This mode is entered by executing the CPU WAI instruction. In this mode the CPU will not execute
instructions. The internal CPU signals (address and data bus) will be fully static. All peripherals stay
active. For further power consumption the peripherals can individually turn off their local clocks.
相關PDF資料
PDF描述
9S12DJ64DGV1 9S12DJ64DG Device Guide. also covers 9S12D64. 9S12A64. 9S12D32 and 9S12A32 devices
9S12DJ64-ZIP_PART2 MC9S12DJ64 Users Guides. zip format. part 2
9S12DP256BDGV2 9S12Dx256B Device Guide. also covers C derivatives and 9S12Ax256 devices
9S12DP512DGV1 9S12Dx512 Device Guide
9S12DT128BDGV1 9S12DT128B Device Guide
相關代理商/技術參數(shù)
參數(shù)描述
9S12DJ64DGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12DJ64DG Device Guide. also covers 9S12D64. 9S12A64. 9S12D32 and 9S12A32 devices
9S12DP256BDGV1 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Automotive applications
9S12DP256BDGV2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12Dx256B Device Guide. also covers C derivatives and 9S12Ax256 devices
9S12DP512DGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12Dx512 Device Guide
9S12DT128BDGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12DT128B Device Guide
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