
Central Processing Unit (CPU)
Instruction Set Overview
MC9S12T64Revision 1.1.1
MOTOROLA
Central Processing Unit (CPU)
For More Information On This Product,
Go to: www.freescale.com
45
LSL
opr16a
SameasASL
LSL
oprx0_xysppc
LSL
oprx9
,
xysppc
LSL
oprx16
,
xysppc
LSL[D,
xysppc
]
LSL[
oprx16
,
xysppc
]
LSLASameasASLA
LSLBSameasASLB
LSLDSameas ASLD
LogicalshiftleftM
LogicalshiftleftA
LogicalshiftleftB
LogicalshiftleftD
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
INH
INH
INH
78 hh ll
68 xb
68 xb ff
68 xb ee ff
68 xb
68 xb ee ff
48
58
rOPw
rPw
rPOw
frPPw
fIfrPw
fIPrPw
O
O
59
O
LSR
opr16a
LSR
oprx0_xysppc
LSR
oprx9
,
xysppc
LSR
oprx16
,
xysppc
LSR[D,
xysppc
]
LSR[
oprx16
,
xysppc
]
LSRA
LSRB
LSRD
LogicalshiftrightM
0
b7
LogicalshiftrightA
LogicalshiftrightB
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
INH
INH
INH
74 hh ll
64 xb
64 xb ff
64 xb ee ff
64 xb
64 xb ee ff
44
54
rPwO
rPw
rPwO
frPwP
fIfrPw
fIPrPw
O
O
LogicalshiftrightD
0
49
O
MAXA
oprx0_xysppc
MAXA
oprx9
,
xysppc
MAXA
oprx16
,
xysppc
MAXA[D,
xysppc
]
MAXA[
oprx16
,
xysppc
]
MAXM
oprx0_xysppc
MAXM
oprx9
,
xysppc
MAXM
oprx16
,
xysppc
MAXM[D,
xysppc
]
MAXM[
oprx16
,
xysppc
]
MEM
Maximum in A; put larger of 2
unsigned 8-bit values in A
MAX[(A), (M)]
A
N, Z, V, C bits reflect result of internal
compare [(A)–(M)]
Maximum in M; put larger of 2
unsigned 8-bit values in M
MAX[(A), (M)]
M
N, Z, V, C bits reflect result of internal
compare [(A)–(M)]
Determine grade of membership;
μ
(grade)
M
Y
; (X)+4
X; (Y)+1
Y
If (A)<P1 or (A)>P2, then
μ
=0; else
μ
=
MIN[((A)–P1)
×
S1, (P2–(A))
×
S2, $FF]
(A)=current crisp input value; X points
at 4 data bytes (P1, P2, S1, S2) of a
trapezoidal membership function; Y
points at fuzzy input (RAM location)
Minimum in A; put smaller of 2
unsigned 8-bit values in A
MIN[(A), (M)]
A
N, Z, V, C bits reflect result of internal
compare [(A)–(M)]
Minimum in N; put smaller of two
unsigned 8-bit values in M
MIN[(A), (M)]
M
N, Z, V, C bits reflect result of internal
compare [(A)–(M)]
Move byte
Memory-to-memory 8-bit byte-move
(M
1
)
M
2
Firstoperand specifiesbyte to move
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
Special
18 18 xb
18 18 xb ff
18 18 xb ee ff
18 18 xb
18 18 xb ee ff
OrPf
OrPO
OfrPP
OfIfrPf
OfIPrPf
18 1C xb
18 1C xb ff
18 1C xb ee ff
18 1C xb
18 1C xb ee ff
OrPw
OrPwO
OfrPwP
OfIfrPw
OfIPrPw
01
RRfOw
MINA
oprx0_xysppc
MINA
oprx9
,
xysppc
MINA
oprx16
,
xysppc
MINA[D,
xysppc
]
MINA[
oprx16
,
xysppc
]
MINM
oprx0_xysppc
MINM
oprx9
,
xysppc
MINM
oprx16
,
xysppc
MINM[D,
xysppc
]
MINM[
oprx16
,
xysppc
]
MOVB#
opr8
,
opr16a
MOVB#
opr8i
,
oprx0_xysppc
MOVB
opr16a
,
opr16a
MOVB
opr16a
,
oprx0_xysppc
MOVB
oprx0_xysppc
,
opr16a
MOVB
oprx0_xysppc
,
oprx0_xysppc
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
IMM-EXT
IMM-IDX
EXT-EXT
EXT-IDX
IDX-EXT
IDX-IDX
18 19 xb
18 19 xb ff
18 19 xb ee ff
18 19 xb
18 19 xb ee ff
OrPf
OrPO
OfrPP
OfIfrPf
OfIPrPf
18 1D xb
18 1D xb ff
18 1D xb ee ff
18 1D xb
18 1D xb ee ff
OrPw
OrPwO
OfrPwP
OfIfrPw
OfIPrPw
18 0B ii hh ll
18 08 xb ii
18 0C hh ll hh ll
18 09 xb hh ll
18 0D xb hh ll
18 0A xb xb
OPwP
OPwO
OrPwPO
OPrPw
OrPwP
OrPwO
Table 4 Instruction Set Summary (Continued)
Source Form
Operation
Address
Mode
Machine
Coding (Hex)
Access Detail
S X H I N Z V C
C
0
b7
b0
– – – –
C
0
b7
b0
A
B
b7
b0
– – – –
C
b0
– – – – 0
C
b7
b0
A
B
b7
b0
– – – – 0
– – – –
– – – –
– – –
– – – –
– – – –
– – – – – – – –
F
Freescale Semiconductor, Inc.
n
.