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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� A3P600L-1FG484I
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 240/242闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 1KB FLASH 600K 484-FBGA
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 40
绯诲垪锛� ProASIC3L
RAM 浣嶇附瑷�(j矛)锛� 110592
杓稿叆/杓稿嚭鏁�(sh霉)锛� 235
闁€鏁�(sh霉)锛� 600000
闆绘簮闆诲锛� 1.14V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 484-BGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 484-FPBGA锛�23x23锛�
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ProASIC3L Low Power Flash FPGAs
Revision 13
2-81
3.3 V PCI, 3.3 V PCI-X
Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI Bus
applications.
AC loadings are defined per the PCI/PCI-X specifications for the database; Microsemi loadings for
enable path characterization are described in Figure 2-12.
AC loadings are defined per PCI/PCI-X specifications for the datapath; Microsemi loading for tristate is
described in Table 2-127.
Timing Characteristics
1.5 V DC Core Voltage
Table 2-126 Minimum and Maximum DC Input and Output Levels
3.3 V PCI/PCI-X
VIL
VIH
VOL
VOH IOL IOH
IOSL
IOSH
IIL IIH
Drive Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA1
Max.
mA1
A2 A2
Per PCI specification
Per PCI curves
10 10
Notes:
1. Currents are measured at 100掳C junction temperature and maximum voltage.
2. Currents are measured at 85掳C junction temperature.
Figure 2-12 AC Loading
Test Point
Enable Path
R to VCCI for tLZ / tZL / tZLS
10 pF for tZH / tZHS / tZL / tZLS
10 pF for tHZ / tLZ
R to GND for tHZ / tZH / tZHS
R = 1 k
Test Point
Datapath
R = 25
R to VCCI for tDP (F)
R to GND for tDP (R)
Table 2-127 AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
CLOAD (pF)
0
3.3
0.285 * VCCI for tDP(R)
0.615 * VCCI for tDP(F)
10
Note: *Measuring point = Vtrip. See Table 2-27 on page 2-26 for a complete table of trip points.
Table 2-128 3.3 V PCI/PCI-X 鈥� Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70掳C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
Applicable to Pro I/O Banks
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS tEOUT
tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
Std.
0.59
2.52
0.04
2.47
3.33
0.38
2.57
1.80
2.95
3.25
4.58
3.81
ns
鈥�1
0.50
2.15
0.03
2.10
2.84
0.33
2.19
1.53
2.51
2.77
3.90
3.24
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.
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A3P600L-1FGG144I 鍔熻兘鎻忚堪:IC FPGA 1KB FLASH 600K 144-FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ProASIC3L 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛�
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