參數(shù)資料
型號: A40MX02-PLG44
廠商: Microsemi SoC
文件頁數(shù): 81/142頁
文件大?。?/td> 0K
描述: IC FPGA 57I/O 44PLCC
標(biāo)準(zhǔn)包裝: 27
系列: MX
輸入/輸出數(shù): 34
門數(shù): 3000
電源電壓: 3 V ~ 3.6 V,4.75 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
其它名稱: 1100-1043
40MX and 42MX FPGA Families
Re vi s i on 11
1 - 39
PCI System Timing Specification
Table 1-26 and Table 1-27 list the critical PCI timing parameters and the corresponding timing
parameters for the MX PCI-compliant devices.
PCI Models
Microsemi provides synthesizable VHDL and Verilog-HDL models for a PCI Target interface, a PCI
Target and Target+DMA Master interface. Contact your Microsemi sales representative for more
details.
Table 1-26 Clock Specification for 33 MHz PCI
Symbol
Parameter
PCI
A42MX24
A42MX36
Units
Min.
Max.
Min.
Max.
Min.
Max.
tCYC
CLK Cycle Time
30
–4.0–4.0
ns
tHIGH
CLK High Time
11
–1.9–1.9
ns
tLOW
CLK Low Time
11
–1.9–1.9
ns
Table 1-27 Timing Parameters for 33 MHz PCI
PCI
A42MX24
A42MX36
Symbol
Parameter
Min.
Max. Min. Max. Min. Max. Units
tVAL
CLK to Signal Valid—Bused Signals
2
11
2.0
9.0
2.0
9.0
ns
tVAL(PTP) CLK to Signal Valid—Point-to-Point
2 2
12
2.0
9.0
2.0
9.0
ns
tON
Float to Active
2
2.0
4.0
2.0
4.0
ns
tOFF
Active to Float
28
8.31
–8.31
ns
tSU
Input Set-Up Time to CLK—Bused Signals
7
1.5
1.5
ns
tSU(PTP) Input Set-Up Time to CLK—Point-to-Point
10, 122
1.5
1.5
ns
tH
Input Hold to CLK
0
0
0
ns
Notes:
1. TOFF is system dependent. MX PCI devices have 7.4 ns turn-off time, reflection is typically an additional
10 ns.
2. REQ# and GNT# are point-to-point signals and have different output valid delay and input setup times
than do bussed signals. GNT# has a setup of 10; REW# has a setup of 12.
相關(guān)PDF資料
PDF描述
A3P400-FGG256 IC FPGA 194I/O 256FBGA
EEC10DREH-S93 CONN EDGECARD 20POS .100 EYELET
GMC49DRYH-S734 CONN EDGECARD 98POS DIP .100 SLD
MSC8126TMP6400 DSP 16BIT 400MHZ MULTI 431FCPBGA
FMC15DRXS-S734 CONN EDGECARD 30POS DIP .100 SLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A40MX02-PLG44I 功能描述:IC FPGA MX SGL CHIP 3K 44-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:MX 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)
A40MX02-PLG44M 制造商:Microsemi Corporation 功能描述:FPGA 40MX Family 3K Gates 295 Cells 83MHz/139MHz 0.45um Technology 3.3V/5V 44-Pin PLCC 制造商:Microsemi Corporation 功能描述:FPGA 3K GATES 295 CELLS 83MHZ/139MHZ 0.45UM 3.3V/5V 44PLCC - Rail/Tube 制造商:Microsemi Corporation 功能描述:IC FPGA MX SGL CHIP 3K 44-PLCC
A40MX02-PLG68 功能描述:IC FPGA 57I/O 68PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:MX 標(biāo)準(zhǔn)包裝:24 系列:ECP2 LAB/CLB數(shù):1500 邏輯元件/單元數(shù):12000 RAM 位總計(jì):226304 輸入/輸出數(shù):131 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP(28x28)
A40MX02-PLG68A 功能描述:IC FPGA MX SGL CHIP 3K 68-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:MX 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)
A40MX02-PLG68I 功能描述:IC FPGA MX SGL CHIP 3K 68-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:MX 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA(17x17)