參數(shù)資料
型號(hào): A40MX04-PLG68A
元件分類: FPGA
英文描述: FPGA, 6000 GATES, PQCC68
封裝: PLASTIC, LCC-68
文件頁(yè)數(shù): 8/76頁(yè)
文件大小: 429K
代理商: A40MX04-PLG68A
MX Automotive Family FPGAs
1- 1 0
v2 .0
Package Thermal Characteristics
The device junction-to-case thermal characteristic is
θ
jc,
and the junction-to-ambient air characteristic is
θ
ja. The
thermal characteristics for
θ
ja
are shown with two
different air flow rates.
Maximum junction temperature is 150°C.
A sample calculation of the absolute maximum power
dissipation allowed for a PQFP 160-pin package at
commercial temperature is as follows:
Power Dissipation
General Power Equation
P = [ICCstandby + ICCactive] * VCCI + IOL* VOL* N
+ IOH * (VCCI – VOH) * M
where:
ICCstandby is the current flowing when no inputs or
outputs are changing.
ICCactive is the current flowing due to CMOS
switching.
IOL, IOH are TTL sink/source currents.
VOL, VOH are TTL level output voltages.
N equals the number of outputs driving TTL loads to
VOL.
M equals the number of outputs driving TTL loads to
VOH.
Accurate values for N and M are difficult to determine
because they depend on the family type, on design
details, and on the system I/O. The power can be divided
into two components: static and active.
Static Power Component
Actel FPGAs have small static power components that
result in power dissipation lower than PALs or CPLDs. By
integrating multiple PALs/CPLDs into one FPGA, an even
greater reduction in board-level power dissipation can
be achieved.
The power due to standby current is typically a small
component of the overall power.
The static power dissipation by TTL loads depends on the
number of outputs driving HIGH or LOW, and on the DC
load current. Again, this number is typically small. For
instance, a 32-bit bus sinking 4 mA at 0.33V will generate
42 mW with all outputs driving LOW, and 140 mW with
all outputs driving HIGH. The actual dissipation will
average somewhere in between, as I/Os switch states
with time.
Plastic Packages
Pin Count
θ
jc
θ
ja
Still Air
300 ft/min
Plastic Quad Flat Pack
100
12
34°C/W
31°C/W
Plastic Quad Flat Pack
160
10
32°C/W
24°C/W
Plastic Quad Flat Pack
208
8
30°C/W
23°C/W
Plastic Quad Flat Pack
240
3.5
19°C/W
16°C/W
Plastic Leaded Chip Carrier
68
13
36°C/W
25°C/W
Plastic Leaded Chip Carrier
84
12
32°C/W
22°C/W
Thin Plastic Quad Flat Pack
176
11
28°C/W
21°C/W
Very Thin Plastic Quad Flat Pack
80
12
39°C/W
33°C/W
Very Thin Plastic Quad Flat Pack
100
10
38°C/W
32°C/W
Max. junction temp. (°C) – Max. commercial temp.
θ
ja
(°C/W)
-----------------------------------------------------------------------------------------------------------------------------------
150°C – 125°C
32°C/W
---------------------------------------0.78W
==
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