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| 型號(hào)： | A42MX16-2VQ100A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 40MX and 42MX FPGA Families |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件頁(yè)數(shù)： | 57/120頁(yè) |
| 文件大?。?/td> | 854K |
| 代理商： | A42MX16-2VQ100A |
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41
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
3.9
System Control and Reset
3.9.1
Resetting the Atmel AVR
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. The instruction placed at the Reset Vector must be a JMP - Absolute
Jump - instruction to the reset handling routine. If the program never enables an interrupt
source, the Interrupt Vectors are not used, and regular program code can be placed at these
locations. This is also the case if the Reset Vector is in the Application section while the Interrupt
Vectors are in the Boot section or vice versa. The circuit diagram in Figure 3-15 on page 42
shows the reset logic. Table 3-13 on page 42 defines typical electrical parameters of the reset
circuitry (Further information in Section 5.2 “Operating Characteristics of Atmel ATA6289” on
page 199ff).
The I/O ports of the Atmel AVR are immediately reset to their initial state when a reset source
goes active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in Section 3.7.3 “Clock Sources” on page 33.
3.9.2
Reset Sources
The ATA6289 has five sources of reset:
Power-on Reset: The MCU is reset when the supply voltage is below the Power-on Reset
threshold (V
POT).
External Reset: The MCU is reset when a low level is present on the RESET - pin for longer
than the minimum pulse length.
Watchdog Reset: The MCU is reset when the Watchdog Timer period expires and the Watch-
dog is enabled.
Brown-out Reset: The MCU is reset when the supply voltage V
CC is below the Brown-out Reset
threshold (V
BOT) and the Brown-out Detector is enabled.
Temperature Shutdown Reset: The MCU is reset when the ambient temperature exceeds the
specified threshold temperature (TSD) and Temperature Shutdown is enabled.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A42MX16-2VQ100B | 40MX and 42MX FPGA Families |
| A42MX16-2VQ100ES | 40MX and 42MX FPGA Families |
| A42MX16-3PQ100B | 40MX and 42MX FPGA Families |
| A42MX16-3BG100 | 40MX and 42MX FPGA Families |
| A42MX16-3PL100 | 40MX and 42MX FPGA Families |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A42MX16-2VQ100B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2VQ100ES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2VQ100I | 功能描述:IC FPGA MX SGL CHIP 24K 100-VQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:MX 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計(jì):- 輸入/輸出數(shù):360 門(mén)數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27） |
| A42MX16-2VQ100M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2VQG100 | 功能描述:IC FPGA MX SGL CHIP 24K 100-VQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:MX 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計(jì):- 輸入/輸出數(shù):360 門(mén)數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27） |
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