參數(shù)資料
型號(hào)： A54SX08AFG144M
英文描述： Logic IC
中文描述： 邏輯IC
文件頁(yè)數(shù)： 14/36頁(yè)
文件大?。?/td> 833K
代理商： A54SX08AFG144M
54SX Family FPGAs RadTolerant and HiRel
14
v2.0
where:
m
n
p
q
1
Determining Average Switching Frequency
To determine the switching frequency for a design, you must
have a detailed understanding of the data input values to
the circuit. The following guidelines are meant to represent
worst-case scenarios so that they can be generally used to
predict the upper limits of power dissipation. These
guidelines are as follows:
Logic Modules (m)
Inputs Switching (n)
Outputs Switching (p)
First Routed Array Clock Loads (q
1
) =
= Number of logic modules switching at f
m
= Number of input buffers switching at f
n
= Number of output buffers switching at f
p
= Number of clock loads on the first routed array
clock
= Number of clock loads on the second routed
array clock
= Fixed capacitance due to first routed array
clock
= Fixed capacitance due to second routed array
clock
= Fixed number of clock loads on the dedicated
array clock = (528 for A54SX16)
= Equivalent capacitance of logic modules in pF
= Equivalent capacitance of input buffers in pF
= Equivalent capacitance of output buffers in pF
= Equivalent capacitance of routed array clock in
pF
= Equivalent capacitance of dedicated array
clock in pF
= Output lead capacitance in pF
= Average logic module switching rate in MHz
= Average input buffer switching rate in MHz
= Average output buffer switching rate in MHz
= Average first routed array clock rate in MHz
= Average second routed array clock rate in MHz
q
2
r
1
r
2
s
1
C
EQM
C
EQI
C
EQO
C
EQCR
C
EQCD
C
L
f
m
f
n
f
p
f
q1
f
q2
=
=
=
80% of modules
# inputs/4
# output/4
40% of
sequential
modules
40% of
sequential
modules
35 pF
F/10
Second Routed Array Clock Loads
(q
2
)
=
Load Capacitance (C
L
)
Average Logic Module Switching
Rate (f
m
)
Average Input Switching Rate (f
n
)
Average Output Switching Rate (f
p
) =
Average First Routed Array Clock
Rate (f
q1
)
Average Second Routed Array Clock
Rate (f
q2
)
Average Dedicated Array Clock Rate
(f
s1
)
=
=
=
F/5
F/10
F/2
=
=
F/2
=
F
相關(guān)PDF資料
PDF描述
A54SX08-FG144 Field Programmable Gate Array (FPGA)
A54SX08-FG144I Field Programmable Gate Array (FPGA)
A54SX08-PL84 Field Programmable Gate Array (FPGA)
A54SX08-PL84I Field Programmable Gate Array (FPGA)
A54SX08-PL84M Field Programmable Gate Array (FPGA)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A54SX08A-FG208 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs
A54SX08AFG208A 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:SX-A Family FPGAs
A54SX08A-FG208A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs
A54SX08A-FG208B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs
A54SX08AFG208I 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:SX-A Family FPGAs
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