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參數(shù)資料
| 型號： | a8255 |
| 廠商： | Altera Corporation |
| 英文描述： | Programmable Peripheral Interface Adapter(可編程外圍接口適配器) |
| 中文描述： | 可編程外圍接口適配器（可編程外圍接口適配器） |
| 文件頁數(shù)： | 10/13頁 |
| 文件大小： | 250K |
| 代理商： | A8255 |
54
Altera Corporation
a8255 Programmable Peripheral Interface Adapter Data Sheet
Mode 2: Strobed Bidirectional Bus
Mode 2 is used to perform reads and writes of data over a bidirectional
bus controlled by handshake signals. Port A is the only data port capable
of mode 2 operation, while port C provides the five control signals for this
data port. Both input and output data are registered.
Table 11
shows the
configuration for the bidirectional bus.
Table 12
summarizes the configuration of port C in mode 2.
Table 11. Bidirectional Bus Configuration
Name
Signal Type
Description
nstb
Input
Input
Strobe. Enable for input register.
Acknowledge. Indicates that the peripheral is ready to latch the output data. Acts
as the tri-state enable for port A.
Input buffer full flag. When set, indicates data has been loaded into the input
register. Set by
nstb
going low, and reset by the rising edge of the
nrd
input.
Output buffer full flag. Indicates that data has been written to port A. Reset on the
rising edge of
nwr
, and set when
nack
goes low.
Interrupt request. Can be used as the interrupt signal to the CPU that indicates
the peripheral has latched the data. Reset on the falling edge of
nwr
or falling
edge of
nrd
. Set on the rising edge of
nack
when
inte1
is high, or on the rising
edge of
nstb
when
inte2
is high.
Interrupt enable 1. Set by bit set to PC6.
nack
ibf
Output
nobf
Output
intr
Output
inte1
Internal
control bit
Internal
control bit
inte2
Interrupt enable 2. Set by bit set to PC4.
Table 12. Port C Configuration in Mode 2
I/O
Mode 2
Description
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
I/O
I/O
I/O
Dependent on group B configuration
Dependent on group B configuration
Dependent on group B configuration
Output
Input
Output
Input
Output
intra
nstba
ibfa
nacka
nobfa
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