參數(shù)資料
型號： AD1941YSTZRL
廠商： Analog Devices Inc
文件頁數(shù)： 15/36頁
文件大?。?/td> 0K
描述： IC DSP AUDIO 16CHAN 28BIT 48LQFP
標(biāo)準(zhǔn)包裝： 2,000
系列： SigmaDSP®
類型： 音頻處理器
應(yīng)用： 車載系統(tǒng)，家庭影院，電視
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 帶卷 (TR)
AD1940/AD1941
Rev. B | Page 22 of
36
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
1.0
35
25
15
5
TIME (ms)
OU
TPU
T
LEVEL
(
V
)
04607-029
20
10
030
Figure 16. Slew RAM—Linear Update Decreasing Ramp
Constant dB and RC Type (Exponential) Update Math
Exponential math is accomplished by shifts and adds with a
range from 6.1 ms to 1.27 s (–60 dB relative to 0 dB full scale).
When the ramp type is set to 01 (constant dB), each step size is
set to the current value in the slew data. When the ramp type
bits are set to 10 (RC type), the step sizes are equal to the
difference between the values in the target RAM and slew RAM.
Figure 17 and Figure 18 show examples of this type of
target/slew RAM ramping. A decreasing ramp of both the
constant dB and RC type ramps is a mirror image of the
constant dB increasing ramp, and is show in Figure 19.
04607-0-018
TIME (ms)
OU
TPU
T
LEVEL
(
V
)
1
0.8
0.6
0.4
0.2
0
–0.6
–0.4
–0.2
–0.8
–1
010
520
15
30
25
35
Figure 17. Slew RAM—Constant dB Update Increasing Ramp
04607-0-019
TIME (ms)
OU
TPU
T
LEVEL
(
V
)
1
0.8
0.6
0.4
0.2
0
–0.6
–0.4
–0.2
–0.8
–1
35
25
15
5
20
10
030
Figure 18. Slew RAM—RC Type Update Increasing Ramp
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
1.0
TIME (ms)
OU
TPU
T
LEVEL
(
V
)
04607-030
35
25
15
5
20
10
030
Figure 19. Slew RAM—Constant dB and RC Type
Update Decreasing Ramp, Full Scale
04607-0-020
TIME (ms)
OU
TPU
T
LEVEL
(
V
)
1
0.8
0.6
0.4
0.2
0
–0.6
–0.4
–0.2
–0.8
–1
35
25
15
5
20
10
030
Figure 20. Slew RAM—Constant Time Update Increasing Ramp, Full Scale
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