I
參數(shù)資料
型號(hào): AD5170BRMZ50-RL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 7/24頁(yè)
文件大?。?/td> 0K
描述: IC DGTL POT 256POS 50K 10MSOP
標(biāo)準(zhǔn)包裝: 1,000
接片: 256
電阻(歐姆): 50k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 35 ppm/°C
存儲(chǔ)器類(lèi)型: 易失
接口: I²C,2 線串口
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 帶卷 (TR)
AD5170
Rev. G | Page 15 of 24
THEORY OF OPERATION
04
10
4-
0
22
SDA
SCL
A
W
B
COMPARATOR
MUX
DECODER
FUSES
EN
FUSE
REG.
DAC
REG.
I2C INTERFACE
ONE-TIME
PROGRAM/TEST
CONTROL BLOCK
Figure 33. Detailed Functional Block Diagram
The AD5170 is a 256-position, digitally controlled, variable
resistor (VR) that employs fuse link technology to achieve
memory retention of the resistance setting.
An internal power-on preset places the wiper at midscale during
power-on. If the OTP function is activated, the device powers
up at the user-defined permanent setting.
ONE-TIME PROGRAMMING (OTP)
Prior to OTP activation, the AD5170 presets to midscale during
initial power-on. After the wiper is set at the desired position,
the resistance can be permanently set by programming the T bit
high along with the proper coding (see Table 9 and Table 10) and
one-time VDD_OTP. Note that fuse link technology of the AD517x
family of digital potentiometers requires that VDD_OTP between 5.6 V
and 5.8 V blow the fuses to achieve a given nonvolatile setting. On
the other hand, VDD can be 2.7 V to 5.5 V during operation. For
system supplies that are lower than 5.6 V, an external supply for
one-time programming is required. Note that the user is allowed
only one attempt in blowing the fuses. If the user fails to blow the
fuses at the first attempt, the structures of the fuses may have
changed such that they can never be blown, regardless of the
energy applied at subsequent events. For details, see the Power
The device control circuit has two validation bits, E1 and E0,
that can be read back to check the programming status (see
Table 6). Users should always read back the validation bits to
ensure that the fuses are properly blown. After the fuses are
blown, all fuse latches are enabled upon subsequent power-on;
therefore, the output corresponds to the stored setting. Figure 33
shows a detailed functional block diagram.
Table 6. Validation Status
E1
E0
Status
0
Ready for programming.
1
0
Fatal error. Some fuses are not blown. Do not retry.
Discard this unit.
1
Successful. No further programming is possible.
PROGRAMMING THE VARIABLE RESISTOR AND
VOLTAGE—RHEOSTAT OPERATION
The nominal resistance (RAB) between Terminal A and Terminal B
is available in 2.5 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ. The nominal
resistance of the VR has 256 contact points that are accessed by
the wiper terminal, plus the B terminal contact. The 8-bit data
in the RDAC latch is decoded to select one of the 256 possible
settings.
A
W
B
A
W
B
A
W
B
0
41
04
-0
24
Figure 34. Rheostat Mode Configuration
Assuming that a 10 kΩ part is used, the first connection of the
wiper starts at Terminal B for Data 0x00. Because there is a 50 Ω
wiper contact resistance, such a connection yields a minimum of
100 Ω (2 × 50 Ω) resistance between Terminal W and Terminal B.
The second connection is the first tap point, which corresponds
to 139 Ω (RWB = RAB/256 + 2 × RW = 39 Ω + 2 × 50 Ω) for Data
0x01. The third connection is the next tap point, representing
178 Ω (2 × 39 Ω + 2 × 50 Ω) for Data 0x02, and so on. Each LSB
data value increase moves the wiper up the resistor ladder until
the last tap point is reached at 10,100 Ω (RAB + 2 × RW).
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