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參數(shù)資料
| 型號： | AD5231BRU10-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT 1024POS 16-TSSOP TR |
| 標準包裝： | 1,000 |
| 接片： | 1024 |
| 電阻（歐姆）： | 10k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標準值 600 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | 4 線 SPI（芯片選擇） |
| 電源電壓： | 2.7 V ~ 5.5 V，±2.25 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
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AD5231
Data Sheet
Rev. D | Page 22 of 28
FLASH/EEMEM RELIABILITY
The Flash/EE memory array on the AD5231 is fully qualified
for two key Flash/EE memory characteristics, namely Flash/EE
memory cycling endurance and Flash/EE memory data
retention.
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many program, read, and erase cycles. In real
terms, a single endurance cycle is composed of four
independent, sequential events. These events are defined as
Initial page erase sequence
Read/verify sequence
Byte program sequence
Second read/verify sequence
During reliability qualification, Flash/EE memory is cycled
from 0x000 to 0x3FF until a first fail is recorded signifying the
endurance limit of the on-chip Flash/EE memory.
As indicated in the Specifications section, the AD5231 Flash/EE
memory endurance qualification has been carried out in
accordance with JEDEC Specification A117 over the industrial
temperature range of 40°C to +85°C. The results allow the
specification of a minimum endurance figure over supply and
temperature of 100,000 cycles, with an endurance figure of
700,000 cycles being typical of operation at 25°C.
Retention quantifies the ability of the Flash/EE memory to
retain its programmed data over time. Again, the AD5231 has
been qualified in accordance with the formal JEDEC Retention
Lifetime Specification (A117) at a specific junction temperature
(TJ = 55°C). As part of this qualification procedure, the
Flash/EE memory is cycled to its specified endurance limit,
described previously, before data retention is characterized.
This means that the Flash/EE memory is guaranteed to retain
its data for its full specified retention lifetime every time the
Flash/EE memory is reprogrammed. It should also be noted
that retention lifetime, based on an activation energy of 0.6 eV,
retained for 100 years at 55°C operation, but reduces to 15 years
at 85°C operation. Beyond these limits, the part must be
reprogrammed so that the data can be restored.
300
250
0
40
RE
T
E
NT
IO
N
(
Y
ears)
200
150
100
50
60
70
80
90
100
110
TJ JUNCTION TEMPERATURE (°C)
ANALOG DEVICES
TYPICAL PERFORMANCE
AT TJ = 55°C
02739-
044
Figure 45. Flash/EE Memory Data Retention
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