參數(shù)資料
型號： AD5313ARUZ
廠商： Analog Devices Inc
文件頁數(shù)： 13/28頁
文件大?。?/td> 0K
描述： IC DAC 10BIT DUAL R-R 16-TSSOP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 96
設(shè)置時(shí)間： 7µs
位數(shù)： 10
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 單電源
功率耗散（最大）： 2.5mW
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 管件
輸出數(shù)目和類型： 2 電壓，單極；2 電壓，雙極
采樣率（每秒）： 143k
產(chǎn)品目錄頁面： 782 (CN2011-ZH PDF)
AD5303/AD5313/AD5323
Rev. B | Page 20 of 28
MICROPROCESSER INTERFACING
AD5303/AD5313/AD5323 TO ADSP-2101
INTERFACE
Figure 35 shows a serial interface between the AD5303/AD5313/
AD5323 and the ADSP-2101. The ADSP-2101 should be set up
to operate in the SPORT transmit alternate framing mode. The
ADSP-2101 sport is programmed through the SPORT control
register and should be configured as follows: internal clock
operation, active-low framing, 16-bit word length. Transmission
is initiated by writing a word to the Tx register after the SPORT
has been enabled.
SCLK
DIN
SYNC
TFS
DT
SCLK
*ADDITIONAL PINS OMITTED FOR CLARITY
00
47
2-
0
35
AD5303/
AD5313/
AD5323*
ADSP-2101
Figure 35. AD5303/AD5313/AD5323 to ADSP-2101 Interface
AD5303/AD5313/AD5323 TO 68HC11/68L11
INTERFACE
Figure 36 shows a serial interface between the AD5303/
AD5313/AD5323 and the 68HC11/68L11 microcontroller.
SCK of the 68HC11/68L11 drives the SCLK of the AD5303/
AD5313/AD5323, while the MOSI output drives the serial data
line (DIN) of the DAC. The SYNC signal is derived from a port
line (PC7). The setup conditions for correct operation of this
interface are as follows: the 68HC11/68L11 should be con-
figured so that its CPOL bit is a 0 and its CPHA bit is a 1.
When data is being transmitted to the DAC, the SYNC line
is taken low (PC7). When the 68HC11/68L11 is configured
as previously mentioned, data appearing on the MOSI output
is valid on the falling edge of SCK. Serial data from the 68HC11/
68L11 is transmitted in 8-bit bytes with only eight falling clock
edges occurring in the transmit cycle. Data is transmitted MSB
first. To load data to the AD5303/AD5313/ AD5323, PC7 is left
low after the first eight bits are transferred and a second serial
write operation is performed to the DAC; PC7 is taken high at
the end of this procedure.
DIN
SCLK
SYNC
PC7
SCK
MOSI
68HC11/68L11*
*ADDITIONAL PINS OMITTED FOR CLARITY
0
4
7
2
-0
3
6
AD5303/
AD5313/
AD5323*
Figure 36. AD5303/AD5313/AD5323 to 68HC11/68L11 Interface
AD5303/AD5313/AD5323 TO 80C51/80L51
INTERFACE
Figure 37 shows a serial interface between the AD5303/
AD5313/AD5323 and the 80C51/80L51 microcontroller. The
setup for the interface is as follows: TXD of the 80C51/80L51
drives SCLK of the AD5303/AD5313/AD5323, while RXD
drives the serial data line of the part. The SYNC signal is again
derived from a bit programmable pin on the port. In this case,
port line P3.3 is used. When data is to be transmitted to the
AD5303/AD5313/AD5323, P3.3 is taken low. The 80C51/80L51
transmits data only in 8-bit bytes; thus only eight falling clock
edges occur in the transmit cycle. To load data to the DAC, P3.3
is left low after the first eight bits are transmitted and a second
write cycle is initiated to transmit the second byte of data. P3.3
is taken high following the completion of this cycle. The 80C51/
80L51 output the serial data in a format that has the LSB first.
The AD5303/AD5313/AD5323 require data with MSB as the
first bit received. The 80C51/80L51 transmit routine should
take this into account.
DIN
SCLK
P3.3
TXD
RXD
80C51/80L51*
*ADDITIONAL PINS OMITTED FOR CLARITY.
00
47
2-
03
7
SYNC
AD5303/
AD5313/
AD5323*
Figure 37. AD5303/AD5313/AD5323 to 80C51/80L51 Interface
AD5303/AD5313/AD5323 TO MICROWIRE
INTERFACE
Figure 38 shows an interface between the AD5303/AD5313/
AD5323 and any MICROWIRE-compatible device. Serial
data is shifted out on the falling edge of the serial clock and
is clocked into the AD5303/AD5313/AD5323 on the rising
edge of the SK.
DIN
SCLK
SK
SO
MICROWIRE*
*ADDITIONAL PINS OMITTED FOR CLARITY.
00
47
2-
0
38
CS
SYNC
AD5303/
AD5313/
AD5323*
Figure 38. AD5303/AD5313/AD5323 to MICROWIRE Interface
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