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| 型號： | AD5380BSTZ-3 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 27/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT 40CHAN 3V 100LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | Redesign Change 28/Oct/2011 |
| 設(shè)計資源： | 40 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5380 (CN0007) Output Channel Monitoring Using AD5380 (CN0008) |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時間： | 6µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | I²C，并聯(lián)，串行 |
| 轉(zhuǎn)換器數(shù)目： | 40 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 125mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 40 電壓，單極 |
| 采樣率（每秒）： | 125k |
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Data Sheet
AD5380
Rev. C | Page 33 of 40
APPLICATION INFORMATION
POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful considera-
tion of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit board on
which the AD5380 is mounted should be designed so that the
analog and digital sections are separated and confined to
certain areas of the board. If the AD5380 is in a system where
multiple devices require an AGND-to-DGND connection, the
connection should be made at one point only, a star ground
point established as close to the device as possible.
For supplies with multiple pins (AVDD, DVDD), these pins
should be tied together. The AD5380 should have ample supply
bypassing of 10 F in parallel with 0.1 F on each supply,
located as close to the package as possible and ideally right up
against the device. The 10 F capacitors are the tantalum bead
type. The 0.1 F capacitor should have low effective series resis-
tance (ESR) and effective series inductance (ESI), like the
common ceramic types that provide a low impedance path to
ground at high frequencies, to handle transient currents due to
internal logic switching.
The power supply lines of the AD5380 should use as large a
trace as possible to provide low impedance paths and reduce the
effects of glitches on the power supply line. Fast switching
signals such as clocks should be shielded with digital ground
to avoid radiating noise to other parts of the board, and should
never be run near the reference inputs. A ground line routed
between the DIN and SCLK lines will help reduce crosstalk
between them (this is not required on a multilayer board
because there will be a separate ground plane, but separating
the lines will help). It is essential to minimize noise on the
REFOUT/REFIN line.
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to
each other. This reduces the effects of feedthrough through
the board. A micro-strip technique is the best, but is not always
possible with a double-sided board. In this technique, the
component side of the board is dedicated to the ground plane
while signal traces are placed on the solder side.
TYPICAL CONFIGURATION CIRCUIT
Figure 39 shows a typical configuration for the AD5380-5
when configured for use with an external reference. In the
circuit shown, all AGND, SIGNAL_GND, and DAC_GND pins
are tied together to a common AGND. AGND and DGND are
connected together at the AD5380 device. On power-up, the
AD5380 defaults to external reference operation. All AVDD
lines are connected together and driven from the same 5 V
source. It is recommended to decouple close to the device
with a 0.1 F ceramic and a 10 F tantalum capacitor. In this
application, the reference for the AD5380-5 is provided
externally from either an ADR421 or ADR431 2.5 V reference.
Suitable external references for the AD5380-3 include the
ADR280 1.2 V reference. The reference should be decoupled at
the REFOUT/REFIN pin of the device with a 0.1 F capacitor.
03731-039
ADR431/
ADR421
AD5380-5
AVDD
DVDD
SIGNAL_GND
DAC_GND
DGND
VOUT39
VOUT0
AGND
REFOUT/REFIN
REFGND
0.1
F
10
F
0.1
F
0.1
F
AVDD
DVDD
Figure 39. Typical Configuration with External Reference
Figure 40 shows a typical configuration when using the internal
reference. On power-up, the AD5380 defaults to an external
reference; therefore, the internal reference needs to be config-
ured and turned on via a write to the AD5380 control register.
Control Register Bit CR12 allows the user to choose the
reference value; Bit CR 10 is used to select the internal
reference. It is recommended to use the 2.5 V reference when
AVDD = 5 V, and the 1.25 V reference when AVDD = 3 V.
03731-040
AD5380
AVDD
DVDD
SIGNAL_GND
DAC_GND
DGND
VOUT39
VOUT0
AGND
REFOUT/REFIN
REFGND
0.1
F
10
F
0.1
F
0.1
F
AVDD
DVDD
Figure 40. Typical Configuration with Internal Reference
Digital connections have been omitted for clarity. The AD5380
contains an internal power-on reset circuit with a 10 ms brown-
out time. If the power supply ramp rate exceeds 10 ms, the user
should reset the AD5380 as part of the initialization process to
ensure the calibration data gets loaded correctly into the device.
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| AD5380BSTZ-5 | 功能描述:IC DAC 14BIT 12C 40CH 5V 100LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| ad5381bst-3 | 制造商:Rochester Electronics LLC 功能描述:32/40-CHANNEL 3V/5V SINGLE SUPPLY 12/14-BIT VOUT DAC - Bulk 制造商:Analog Devices 功能描述: |
| AD5381BST-3-REEL | 制造商:Analog Devices 功能描述:DAC 40-CH Resistor-String 12-bit 100-Pin LQFP T/R |
| AD5381BST-5 | 制造商:Analog Devices 功能描述:DAC 40-CH Resistor-String 12-bit 100-Pin LQFP |
| AD5381BST-5-REEL | 制造商:Analog Devices 功能描述:DAC 40-CH Resistor-String 12-bit 100-Pin LQFP T/R |
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