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| 型號(hào)： | AD5382BSTZ-5 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT 32CH 5V 100-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | Redesign Change 28/Oct/2011 |
| 設(shè)計(jì)資源： | 32 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5382 (CN0011) AD5382 Channel Monitor Function (CN0012) |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時(shí)間： | 8µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 32 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 65mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 32 電壓，單極 |
| 采樣率（每秒）： | 125k |
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Data Sheet
AD5382
Rev. C | Page 23 of 40
Table 15. Control Register Contents
MSB
LSB
CR13
CR12
CR11
CR10
CR9
CR8
CR7
CR6
CR5
CR4
CR3
CR2
CR1
CR0
Control Register Write/Read
REG1 = REG0 = 0, A4–A0 = 01100, R/W status determines
if the operation is a write (R/W = 0) or a read (R/W = 1).
DB13 to DB0 contain the control register data.
Control Register Contents
CR13: Power-Down Status. This bit is used to configure the
output amplifier state in power-down.
CR13 = 1. Amplifier output is high impedance (default on
power-up).
CR13 = 0. Amplifier output is 100 k to ground.
CR12: REF Select. This bit selects the operating internal
reference for the AD5382.
CR12 = 1: Internal reference is 2.5 V (AD5382-5 default), the
recommended operating reference for AD5382-5.
CR12 = 0: Internal reference is 1.25 V (AD5382-3 default),
the recommended operating reference for AD5382-3.
CR11: Current Boost Control. This bit is used to boost the
current in the output amplifier, thereby altering its slew rate.
CR11 = 1: Boost Mode On. This maximizes the bias current
in the output amplifier, optimizing its slew rate but increasing
the power dissipation.
CR11 = 0: Boost Mode Off (default on power-up). This
reduces the bias current in the output amplifier and reduces
the overall power consumption.
CR10: Internal/External Reference. This bit determines
if the DAC uses its internal reference or an externally
applied reference.
CR10 = 1: Internal Reference Enabled. The reference output
depends on data loaded to CR12.
CR10 = 0: External Reference Selected (default on power-up).
CR9: Channel Monitor Enable (see Channel Monitor Function)
CR9 = 1: Monitor Enabled. This enables the channel monitor
function. After a write to the monitor channel in the SFR
register, the selected channel output is routed to the
MON_OUT pin.
CR9 = 0: Monitor Disabled (default on power-up). When the
monitor is disabled, MON_OUT is three-stated.
CR8: Thermal Monitor Function. This function is used to
monitor the AD5382’s internal die temperature when enabled.
The thermal monitor powers down the output amplifiers when
the temperature exceeds 130°C. This function can be used to
protect the device when power dissipation may be exceeded if a
number of output channels are simultaneously short-circuited.
A soft power-up re-enables the output amplifiers if the die
temperature drops below 130°C.
CR8 = 1: Thermal Monitor Enabled.
CR8 = 0: Thermal Monitor Disabled (default on power-up).
CR7 and CR6: Don’t Care.
CR5 to CR2: Toggle Function Enable. This function allows the
user to toggle the output between two codes loaded to the A
and B register for each DAC. Control Register Bits CR5 to CR2
are used to enable individual groups of eight channels for
operation in toggle mode. A Logic 1 written to any bit enables a
group of channels; a Logic 0 disables a group. LDAC is used to
toggle between the two registers. Table 16 shows the decoding
for toggle contains Channels 24 to 31, CR5 = 1 enables these
channels.
Table 16.
CR Bit
Group
Channels
CR5
3
24–31
CR4
2
16–23
CR3
1
8–15
CR2
0
0–7
CR1 and CR0: Don’t Care.
Channel Monitor Function
REG1 = REG0 = 0, A4–A0 = 01010
DB13–DB8 = Contain data to address the monitored channel
A channel monitor function is provided on the AD5382.
This feature, which consists of a multiplexer addressed via the
interface, allows any channel output or the signals connected
to the MON_IN inputs to be routed to the MON_OUT pin for
monitoring using an external ADC. The channel monitor func-
tion must be enabled in the control register before any channels
are routed to MON_OUT. On the AD5382, DB13 to DB8
contain the channel address for the monitored channel.
Selecting channel address 63 three-states MON_OUT.
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