參數(shù)資料
型號(hào): AD5392BCPZ-5
廠商: Analog Devices Inc
文件頁數(shù): 27/44頁
文件大小: 0K
描述: IC DAC 14BIT 8CHAN 5V 64LFCSP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告: AD5390/1/2 Redesign Change 16/May/2012
設(shè)計(jì)資源: 8 to 16 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5390/1/2 (CN0029)
AD5390/91/92 Channel Monitor Function (CN0030)
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 8µs
位數(shù): 14
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 16
電壓電源: 單電源
功率耗散(最大): 35mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 托盤
輸出數(shù)目和類型: 8 電壓,單極
采樣率(每秒): 125k
Data Sheet
AD5390/AD5391/AD5392
Rev. E | Page 33 of 44
CONTROL REGISTER WRITE
Table 25 shows the control register contents for the AD5390 and the AD5392. Table 26 provides bit descriptions. Note that REG1 = REG0 = 0,
A3 to A0 = 1100, and DB13 to DB0 contain the control register data.
Table 25. AD5390/AD5392 Control Register Contents
MSB
LSB
CR13
CR12
CR11
CR10
CR9
CR8
CR7
CR6
CR5
CR4
CR3
CR2
CR1
CR0
Table 26. AD5390 and AD5392 Bit Descriptions
Bit
Description
CR13
Power-Down Status. This bit is used to configure the output amplifier state in power–down mode.
CR13 = 1: Amplifier output is high impedance (default on power-up).
CR13 = 0: Amplifier output is 100 kΩ to ground.
CR12
REF Select. This bit selects the operating internal reference for the AD539x. CR12 is programmed as follows:
CR12 = 1: Internal reference is 2.5 V (AD5390-2/AD5392-5 default). Recommended operating reference for AD539x-5.
CR12 = 0: Internal reference is 1.25 V (AD5390-3/AD5392-3 default). Recommended operating reference for AD5390-3 and
AD5392-3.
CR11
Current Boost Control. This bit is used to boost the current in the output amplifier, thus altering its slew rate and is
configured as follows:
CR11 = 1: Boost mode on. This maximizes the bias current in the output amplifier, optimizing its slew rate but increasing
the power dissipation.
CR11 = 0: Boost mode off (default on power-up). This reduces the bias current in the output amplifier and reduces the
overall power consumption.
CR10
Internal/External Reference. This bit determines if the DAC uses its internal reference or an external reference.
CR10 = 1: Internal reference enabled. Reference output depends on data loaded to CR12.
CR10 = 0: External reference selected (default on power-up).
CR9
Channel Monitor Enable (see Table 23).
CR9 = 1: Monitor enabled (default on power-up). This enables the channel monitor function. Following a write to the
monitor channel in the SFR register, the selected channel output is routed to the MON_OUT pin.
CR9 = 0: Monitor disabled. When monitor is disabled, the MON_OUT pin is three-stated.
CR8
Thermal Monitor Function. When enabled, this function is used to monitor the internal die temperature of the
AD5390/AD5392. The thermal monitor powers down the output amplifiers when the temperature exceeds 130°C. This
function can be used to protect the device when the power dissipation of the device may be exceeded, if a number of
output channels are simultaneously short circuited. A soft power-up re-enables the output amplifiers if the die
temperature has dropped below 130°C.
CR8 = 1: Thermal monitor enabled.
CR8 = 0: Thermal monitor disabled (default on power-up).
CR7 to CR4
Don’t Care.
CR3 to CR2
Toggle Function Enable. This function lets the user toggle the output between two codes loaded to the A and B register
for each DAC. Control Register Bits CR3 and CR2 are used to enable individual groups of eight channels for operation in
toggle mode on the AD5390 and AD5392, as follows:
CR3
Group 1
Channel 8 to Channel 15
CR2
Group 0
Channel 0 to Channel 7
CR2 is the only active bit on the AD5392. Logic 1 written to any bit enables a group of channels and Logic 0 disables a
group. LDAC is used to toggle between the two registers.
CR1 to CR0
Don’t Care.
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