and R
參數(shù)資料
型號(hào)： AD5421BREZ
廠商： Analog Devices Inc
文件頁數(shù)： 28/36頁
文件大?。?/td> 0K
描述： IC DAC 16BIT 1.8-12V 28TSSOP
標(biāo)準(zhǔn)包裝： 50
設(shè)置時(shí)間： 50µs
位數(shù)： 16
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
功率耗散（最大）： 625mW
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 28-SOIC（0.173"，4.40mm 寬）裸露焊盤
供應(yīng)商設(shè)備封裝： 28-TSSOP 裸露焊盤
包裝： 管件
輸出數(shù)目和類型： 1 電壓，單極
采樣率（每秒）： *
AD5421
Data Sheet
Rev. G | Page 34 of 36
To determine the absolute worst-case overall error, the reference
and RSET errors can be directly summed with the specified AD5421
maximum error. For example, when using an external reference
and external RSET resistor, the maximum AD5421 error is 0.048%
of full-scale range. Assuming that the absolute errors for the
voltage reference and RSET resistor are, respectively, 0.04% and
0.05% with temperature coefficients of 3 ppm/°C and 2 ppm/°C,
respectively, the overall worst-case error is as follows:
Worst-Case Error =
AD5421 Error + VREF Absolute Error + VREF TC +
RSET Absolute Error + RSET TC
Worst-Case Error =
0.048% + 0.04% + [(3/106) × 100 × 145]% +
0.05% + [(2/106) × 100 × 145]% = 0.21% FSR
This is the absolute worst-case value when the AD5421 operates
over the temperature range of 40°C to +105°C. An error of this
value is very unlikely to occur because the temperature coeffi-
cients of the individual components do not exhibit the same
drift polarity, and, therefore, an element of cancelation occurs.
For this reason, the TC values should be added in a root of
squares fashion.
A further improvement can be gained by performing a two-point
calibration at zero scale and full scale, thus reducing the absolute
errors of the voltage reference and RSET resistor to a combined
error of 1 LSB or 0.0015% FSR. After performing this calibration,
the total maximum error becomes
Total Error =
FSR
%
102
.
0
%)
029
.
0
(
%)
0435
.
0
(
%
0015
.
0
%
048
.
0
2
=
+
To reduce this error value further, a voltage reference and RSET
resistor with lower TC specifications must be chosen.
THERMAL AND SUPPLY CONSIDERATIONS
The AD5421 is designed to operate at a maximum junction temp-
erature of 125°C. To ensure reliable and specified operation over
the lifetime of the product, it is important that the device not be
operated under conditions that cause the junction temperature
to exceed this value.
Excessive junction temperature can occur if the AD5421
experiences elevated voltages across its terminals while
regulating the loop current at a high value. The resulting
junction temperature depends on the ambient temperature.
Table 25 provides the bounds of operation at maximum ambient
temperature and maximum supply voltage. This information is
displayed graphically in Figure 52 and Figure 53. These figures
assume that the exposed paddle is connected to a copper plane
of approximately 6 cm2.
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
20
40
60
80
100
PO
W
ER
D
ISSI
PA
T
IO
N
(W
)
AMBIENT TEMPERATURE (°C)
09128-
103
TSSOP
LFCSP
Figure 52. Maximum Power Dissipation vs. Ambient Temperature
60
50
40
30
20
10
0
40
50
60
70
80
90
100
SU
PPL
Y
VO
L
T
A
G
E
(V)
AMBIENT TEMPERATURE (°C)
09128-
102
LFCSP
TSSOP
Figure 53. Maximum Supply Voltage vs. Ambient Temperature
Table 25. Thermal and Supply Considerations (External MOSFET Not Connected)
Parameter
Description
32-Lead LFCSP
28-Lead TSSOP
Maximum
Power
Dissipation
Maximum permitted power
dissipation when operating at an
ambient temperature of 105°C
mW
500
40
105
125
=
=
JA
A
MAX
J
T
θ
mW
625
32
105
125
=
=
JA
A
J MAX
θ
T
Maximum
Ambient
Temperature
Maximum permitted ambient
temperature when operating from a
supply of 52 V while regulating a loop
current of 22.8 mA
=
×
JA
D
MAX
J
P
T
θ
(
)
(
)
C
77
40
0228
.
0
52
125
°
=
×
C
87
)
32
)
0228
.
0
52
((
125
)
(
°
=
×
=
×
JA
D
MAX
J
P
T
θ
Maximum
Supply
Voltage
Maximum permitted supply voltage
when operating at an ambient
temperature of 105°C while regulating
a loop current of 22.8 mA
V
21
40
0228
.
0
105
125
=
×
=
×
JA
LOOP
A
MAX
J
I
T
θ
V
27
32
0228
.
0
105
125
=
×
=
×
JA
LOOP
A
MAX
J
I
T
θ
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