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參數(shù)資料
| 型號： | AD5570BRSZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT SERIAL IN 16SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 設(shè)置時間： | 12µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 150mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，雙極 |
| 采樣率（每秒）： | 83k |
AD5570
Rev. C | Page 9 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VSS 1
VDD 2
CLR 3
LDAC 4
SYNC 5
SCLK 6
SDIN 7
SDO 8
REFGND
REFIN
REFGND
VOUT
AGNDS
16
15
14
13
12
AGND
PD
DGND
11
10
9
AD5570
TOP VIEW
(Not to Scale)
03760-005
Figure 5. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VSS
Negative Analog Supply Voltage. 12 V ± 5% to 15 V ± 10% for specified performance.
2
VDD
Positive Analog Supply Voltage. 12 V ± 5% to 15 V ± 10% for specified performance.
3
CLR
Level Sensitive, Active Low Input. A falling edge of CLR resets VOUT to AGND. The contents of the registers
are untouched.
4
LDAC
Active Low Control Input. Transfers the contents of the input register to the DAC register. LDAC can be tied
permanently low, enabling the outputs to be updated on the rising edge of SYNC.
5
SYNC
Active Low Control Input. This is the frame synchronization signal for the data. When SYNC goes low, it powers
on the SCLK and SDIN buffers and enables the input shift register. Data is transferred in on the falling edges of
the following 16 clocks.
6
SCLK
Serial Clock Input. Data is clocked into the input register on the falling edge of the serial clock input. Data can
be transferred at rates of up to 8 MHz.
7
SDIN
Serial Data Input. Data is clocked into the 16-bit register on the falling edge of the serial clock input.
8
SDO
Serial Data Output. Can be used for daisy-chaining a number of devices together or for reading back the data in
the shift register for diagnostic purposes. This is an open-drain output; it must be pulled to logic high with an
external pull-up resistor of ~5 kΩ.
9
DGND
Digital Ground. Ground reference for all digital circuitry.
10
PD
Active Low Control Input. Allows the DAC to be put into a power-down state.
11
AGND
Analog Ground. Ground reference for all analog circuitry.
12
AGNDS
Analog Ground Sense. This is normally tied to AGND.
13
VOUT
Analog Output Voltage.
14, 16
REFGND
Reference Ground. Tie this pin to 0 V.
15
REFIN
Voltage Reference Input. This is internally buffered before being applied to the DAC. For bipolar ±10 V output
range, REFIN is 5 V.
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| AD5570WRS | 功能描述:IC DAC 16BIT SRL-IN/VOUT 16-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD5570WRS-REEL | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 16-bit 16-Pin SSOP T/R 制造商:Analog Devices 功能描述:DAC 1CH R-2R 16BIT 16SSOP - Tape and Reel |
| AD5570WRS-REEL7 | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 16-bit 16-Pin SSOP T/R 制造商:Analog Devices 功能描述:DAC 1CH R-2R 16BIT 16SSOP - Tape and Reel |
| AD5570WRSZ | 功能描述:IC DAC 16BIT SRL-IN/VOUT 16-SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD5570WRSZ | 制造商:Analog Devices 功能描述:16BIT DAC SERIAL +/-15V SMD 5570 |
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