參數(shù)資料
型號(hào)： AD5629RBRUZ-2-RL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 1/32頁(yè)
文件大?。?/td> 0K
描述： IC DAC 12BIT I2C/SRL 16TSSOP
標(biāo)準(zhǔn)包裝： 1,000
系列： denseDAC
設(shè)置時(shí)間： 2.5µs
位數(shù)： 12
數(shù)據(jù)接口： I²C，串行
轉(zhuǎn)換器數(shù)目： 8
電壓電源： 單電源
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 帶卷 (TR)
輸出數(shù)目和類型： *
采樣率（每秒）： 166k
Octal, 12-/16-Bit, I2C, denseDACs
with 5 ppm/°C On-Chip Reference
Data Sheet
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2010–2014 Analog Devices, Inc. All rights reserved.
FEATURES
Low power octal DACs
AD5629R: 12 bits
AD5669R: 16 bits
2.6 mm × 2.6 mm 16-ball WLCSP
4 mm × 4 mm 16-lead LFCSP and 16-lead TSSOP
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
Power down to 400 nA at 5 V, 200 nA at 3 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale or midscale
3 power-down functions
Hardware
A
LDACE
A
and
A
CLRE
A
functions
I2C-compatible serial interface supports standard (100 kHz)
and fast (400 kHz) modes
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
FUNCTIONAL BLOCK DIAGRAM
VDD
1.25V/2.5V REF
VREFIN/VREFOUT
LDAC
CLR
GND
INPUT
REGISTER
DAC
REGISTER
STRING
DAC A
VOUTA
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC B
VOUTB
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC C
VOUTC
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC D
VOUTD
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC E
VOUTE
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC F
VOUTF
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC G
VOUTG
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC H
VOUTH
BUFFER
POWER-ON RESET
POWER-DOWN LOGIC
IN
T
E
RF
AC
E
L
O
G
IC
SCL
SDA
A0
AD5629R/AD5669R
08
819-
001
Figure 1.
GENERAL DESCRIPTION
The AD5629R/AD5669R devices are low power, octal, 12-/16-
bit, buffered voltage-output DACs. All devices are guaranteed
monotonic by design.
The AD5629R/AD5669R have an on-chip reference with an
internal gain of 2. The AD5629R-1/AD5669R-1 have a 1.25 V,
5 ppm/°C reference, giving a full-scale output range of 2.5 V.
have a 2.5 V 5 ppm/°C reference, giving a full-scale output range
of 5 V depending on the option selected. Devices with 1.25 V
reference selected operate from a single 2.7 V to 5.5 V supply.
Devices with 2.5 V reference selected operate from 4.5 V to 5.5 V.
The on-chip reference is off at power-up, allowing the use of an
external reference. The internal reference is enabled via a
software write.
The parts incorporate a power-on reset circuit to ensure that
the DAC output powers up to 0 V (AD5629R-1/AD5629R-2,
and remains powered up at this level until a valid write takes place.
The part contains a power-down feature that reduces the current
consumption of the device to 400 nA at 5 V and provides software-
selectable output loads while in power-down mode for any or
all DAC channels.
PRODUCT HIGHLIGHTS
1.
Octal, 12-/16-bit DACs.
2.
On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
3.
Available in 16-lead LFCSP and TSSOP, and 16-ball
WLCSP.
4.
Power-on reset to 0 V or midscale.
5.
Power-down capability. When powered down, the DAC
typically consumes 200 nA at 3 V and 400 nA at 5 V.
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