參數(shù)資料
型號(hào): AD5629RBRUZ-2-RL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 19/32頁(yè)
文件大?。?/td> 0K
描述: IC DAC 12BIT I2C/SRL 16TSSOP
標(biāo)準(zhǔn)包裝: 1,000
系列: denseDAC
設(shè)置時(shí)間: 2.5µs
位數(shù): 12
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 8
電壓電源: 單電源
工作溫度: -40°C ~ 105°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類(lèi)型: *
采樣率(每秒): 166k
AD5629R/AD5669R
Data Sheet
Rev. D | Page 26 of 32
Table 12. Power-Down Modes of Operation
DB9
DB8
Operating Mode
0
Normal operation
Power-down modes
0
1
1 k to GND
1
0
100 k to GND
1
Three-state
Table 13. 32-Bit Input Shift Register Contents for Power-Down/Power-Up Function
MSB
LSB
DB23
DB22
DB21
DB20
DB19 to DB16
DB15 to DB10
DB9
DB8
DB7 to DB1
DB0
0
1
0
X
PD1
PD0
DAC H to DAC B
DAC A
Command bits (C3 to C0)
Address bits (A3 to A0)—
don’t cares
Don’t cares
Power-
down mode
Power-down/power-up channel selection—
set bit to 1 to select
Table 14. 32-Bit Input Shift Register Contents for Clear Code Function
MSB
LSB
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15 to DB2
DB1
DB0
0
1
0
1
X
CR1
CR0
Command bits (C3 to C0)
Address bits (A3 to A0)—don’t cares
Don’t cares
Clear code register
Table 15. Clear Code Register
Clear Code Register
DB1
DB0
CR1
CR0
Clears to Code
0
0x0000
0
1
0x8000
1
0
0xFFFF
1
No operation
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