參數(shù)資料
型號： AD5755ACPZ-REEL7
廠商： Analog Devices Inc
文件頁數(shù)： 33/52頁
文件大小： 0K
描述： IC DAC 16BIT QUAD 64-LFCSP
視頻文件： AD5755: 16-Bit Multi-Channel, Voltage and Current Output DAC
特色產(chǎn)品： AD5755 / AD5755-1 / AD5757 DACs
標準包裝： 1
設置時間： 11µs
位數(shù)： 16
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應商設備封裝： 64-LFCSP-VQ（9x9）
包裝： 標準包裝
輸出數(shù)目和類型： 4 電流，4 電壓
采樣率（每秒）： *
其它名稱： AD5755ACPZ-REEL7DKR
Data Sheet
AD5755
Rev. C | Page 39 of 52
Status Register
The status register is a read only register. This register contains
any fault information as a well as a ramp active bit and a user
toggle bit. When the STATREAD bit in the main control
register is set, the status register contents can be read back on
the SDO pin during every write sequence. Alternatively, if the
STATREAD bit is not set, the status register can be read using
the normal readback operation.
Table 29. Decoding the Status Register
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DC-
DCD
DC-
DCC
DC-
DCB
DC-
DCA
User
toggle
PEC
error
Ramp
active
Over
TEMP
VOUT_D
fault
VOUT_C
fault
VOUT_B
fault
VOUT_A
fault
IOUT_D
fault
IOUT_C
fault
IOUT_B
fault
IOUT_A
fault
Table 30. Status Register Options
Bit
Description
DC-DCD
In current output mode, this bit is set on Channel D if the dc-to-dc converter cannot maintain compliance (it may be
reaching its VMAX voltage). In this case, the IOUT_D fault bit is also set. See the DC-to-DC Converter VMAX Functionality section
for more information on this bit’s operation under this condition.
In voltage output mode, this bit is set if, on Channel D, the dc-to-dc converter is unable to regulate to 15 V as expected.
When this bit is set, it does not result in the FAULT pin going high.
DC-DCC
In current output mode, this bit is set on Channel C if the dc-to-dc converter cannot maintain compliance (it may be
reaching its VMAX voltage). In this case, the IOUT_C fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for
more information on this bit’s operation under this condition.
In voltage output mode, this bit is set if, on Channel C, the dc-to-dc converter is unable to regulate to 15 V as expected.
When this bit is set, it does not result in the FAULT pin going high.
DC-DCB
In current output mode, this bit is set on Channel B if the dc-to-dc converter cannot maintain compliance (it may be
reaching its VMAX voltage). In this case, the IOUT_B fault bit is also set. See the DC-to-DC Converter VMAX Functionality for more
information on this bit’s operation under this condition.
In voltage output mode, this bit is set if, on Channel B, the dc-to-dc converter is unable to regulate to 15 V as expected.
When this bit is set, it does not result in the FAULT pin going high.
DC-DCA
In current output mode, this bit is set on Channel A if the dc-to-dc converter cannot maintain compliance (it may be
reaching its VMAX voltage). In this case, the IOUT_A fault bit is also set. See the DC-to-DC Converter VMAX Functionality for more
information on this bit’s operation under this condition.
In voltage output mode, this bit is set if, on Channel A, the dc-to-dc converter is unable to regulate to 15 V as expected.
When this bit is set, it does not result in the FAULT pin going high.
User Toggle
User toggle bit. This bit is set or cleared via the software register. This can be used to verify data communications if needed.
PEC Error
Denotes a PEC error on the last data-word received over the SPI interface.
Ramp Active
This bit is set while any one of the output channels is slewing (slew rate control is enabled on at least one channel).
Over TEMP
This bit is set if the AD5755 core temperature exceeds approximately 150°C.
VOUT_D Fault
This bit is set if a fault is detected on the VOUT_D pin.
VOUT_C Fault
This bit is set if a fault is detected on the VOUT_C pin.
VOUT_B Fault
This bit is set if a fault is detected on the VOUT_B pin.
VOUT_A Fault
This bit is set if a fault is detected on the VOUT_A pin.
IOUT_D Fault
This bit is set if a fault is detected on the IOUT_D pin.
IOUT_C Fault
This bit is set if a fault is detected on the IOUT_C pin.
IOUT_B Fault
This bit is set if a fault is detected on the IOUT_B pin.
IOUT_A Fault
This bit is set if a fault is detected on the IOUT_A pin.
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