- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8971 > AD5755ACPZ-REEL7 (Analog Devices Inc)IC DAC 16BIT QUAD 64-LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD5755ACPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 35/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT QUAD 64-LFCSP |
| 視頻文件： | AD5755: 16-Bit Multi-Channel, Voltage and Current Output DAC |
| 特色產(chǎn)品： | AD5755 / AD5755-1 / AD5757 DACs |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時間： | 11µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸出數(shù)目和類型： | 4 電流，4 電壓 |
| 采樣率（每秒）： | * |
| 其它名稱： | AD5755ACPZ-REEL7DKR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁當(dāng)前第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
AD5755
Data Sheet
Rev. C | Page 40 of 52
DEVICE FEATURES
OUTPUT FAULT
The AD5755 is equipped with a FAULT pin, an active low open-
drain output allowing several AD5755 devices to be connected
together to one pull-up resistor for global fault detection. The
FAULT pin is forced active by any one of the following fault
scenarios:
The voltage at IOUT_x attempts to rise above the compliance
range due to an open-loop circuit or insufficient power
supply voltage. The internal circuitry that develops the
fault output avoids using a comparator with windowed
limits because this requires an actual output error before
the FAULT output becomes active. Instead, the signal is
generated when the internal amplifier in the output stage
has less than approximately 1 V of remaining drive
capability. Thus, the FAULT output activates slightly before
the compliance limit is reached.
A short is detected on a voltage output pin. The short-
circuit current is limited to 16 mA or 8 mA, which is
programmable by the user. If using the AD5755 in unipolar
supply mode, a short-circuit fault may be generated if the
output voltage is below 50 mV.
An interface error is detected due to a PEC failure. See the
Packet Error Checking section.
If the core temperature of the AD5755 exceeds
approximately 150°C.
The VOUT_x fault, IOUT_x fault, PEC error, and over TEMP bits
of the status register (see Table 30) are used in conjunction with
the FAULT output to inform the user which one of the fault
conditions caused the FAULT output to be activated.
VOLTAGE OUTPUT SHORT-CIRCUIT PROTECTION
Under normal operation, the voltage output sinks/sources up
to 12 mA and maintains specified operation. The maximum
output current or short-circuit current is programmable by
the user and can be set to 16 mA or 8 mA. If a short circuit is
detected, the FAULT goes low, and the relevant VOUT_x fault bit
in the status register is set.
DIGITAL OFFSET AND GAIN CONTROL
Each DAC channel has a gain (M) and offset (C) register, which
allow trimming out of the gain and offset errors of the entire
signal chain. Data from the DAC data register is operated on by
a digital multiplier and adder controlled by the contents of the
M and C registers. The calibrated DAC data is then stored in the
DAC input register.
DAC
REGISTER
DAC
INPUT
REGISTER
M
REGISTER
C
REGISTER
07304-
075
Figure 76. Digital Offset and Gain control
Although Figure 76 indicates a multiplier and adder for each
channel, there is only one multiplier and one adder in the device,
and they are shared among all four channels. This has
implications for the update speed when several channels are
updated at once (see Table 3).
Each time data is written to the M or C register, the output is
not automatically updated. Instead, the next write to the DAC
channel uses these M and C values to perform a new calibration
and automatically updates the channel.
The output data from the calibration is routed to the DAC input
register. This is then loaded to the DAC as described in the
Theory of Operation section. Both the gain register and the
offset register have 16 bits of resolution. The correct method to
calibrate the gain/offset is to first calibrate out the gain and then
calibrate the offset.
The value (in decimal) that is written to the DAC input register
can be calculated by
15
16
2
)
1
(
+
×
=
C
M
D
Code
r
DACRegiste
(1)
where:
D is the code loaded to the input register of the DAC channel.
M is the code in the gain register (default code = 216 – 1).
C is the code in the offset register (default code = 215).
STATUS READBACK DURING A WRITE
The AD5755 has the ability to read back the status register
contents during every write sequence. This feature is enabled
via the STATREAD bit in the main control register. This allows
the user to continuously monitor the status register and act
quickly in the case of a fault.
When status readback during a write is enabled, the contents of
the 16-bit status register (see Table 30) are output on the SDO
pin, as shown in Figure 5.
The AD5755 powers up with this feature disabled. When this is
enabled, the normal readback feature is not available, except for
the status register. To read back any other register, clear the
STATREAD bit first before following the readback sequence.
STATREAD can be set high again after the register read.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-B6J-MV-F1 | CONVERTER MOD DC/DC 36V 150W |
| ICS843031AGI-01LFT | IC CLK GENERATOR LVPECL 8-TSSOP |
| VI-J0M-MZ-F3 | CONVERTER MOD DC/DC 10V 25W |
| VE-B6B-MV-F3 | CONVERTER MOD DC/DC 95V 150W |
| VI-J0M-MZ-F1 | CONVERTER MOD DC/DC 10V 25W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5755BCPZ | 制造商:Analog Devices 功能描述: 制造商:Analog Devices 功能描述:DAC QUAD 16BIT -26.4/33VIN 64LFCSP 制造商:Analog Devices 功能描述:DAC, QUAD, 16BIT, -26.4/33VIN, 64LFCSP 制造商:Analog Devices 功能描述:DAC, QUAD, 16BIT, -26.4/33VIN, 64LFCSP, Resolution (Bits):16bit, Input Channel Type:Serial, Digital IC Case Style:LFCSP, No. of Pins:64, Data Interface:Microwire, QSPI, SPI, Supply Current:8.6mA, Operating Temperature Min:-40C, , RoHS Compliant: Yes |
| AD5755BCPZ-REEL7 | 功能描述:IC DAC 16BIT QUAD 64-LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD5755BCPZX | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Channel, 16-Bit, Serial Input, 4-20mA & Voltage Output DAC, Dynamic Power Control |
| AD5757 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Channel, 16-Bit,Serial Input, 4 mA to 20 mA Output DAC, Dynamic Power Control |
| AD5757_11 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Channel, 16-Bit,Serial Input, 4 mA to 20 mA Output DAC, Dynamic Power Control |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。