參數(shù)資料
型號(hào)： AD5765CSUZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 3/28頁(yè)
文件大?。?/td> 0K
描述： IC DAC 16BIT 5V QUAD 32-TQFP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告： AD5763/65 Metal Layer Edit Change 08/Sept/2009
設(shè)計(jì)資源： High Accuracy, Bipolar Voltage Output Digital-to-Analog Conversion Using AD5765 (CN0073)
標(biāo)準(zhǔn)包裝： 500
設(shè)置時(shí)間： 8µs
位數(shù)： 16
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 雙 ±
功率耗散（最大）： 76mW
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 32-TQFP
供應(yīng)商設(shè)備封裝： 32-TQFP（7x7）
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 4 電壓，雙極
采樣率（每秒）： *
Data Sheet
AD5765
Rev. C | Page 11 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
NC = NO CONNECT
AD5765
TOP VIEW
(Not to Scale)
07249-
006
1
SYNC
2
SCLK
3
SDIN
4
SDO
5
CLR
6
LDAC
7
D0
8
D1
9
RS
T
O
UT
10
R
S
TIN
11
DG
ND
12
DV
CC
13
A
V
DD
14
P
G
ND
15
A
V
SS
16
IS
CC
17
AGNDD
18
VOUTD
19
VOUTC
20
AGNDC
21
AGNDB
22
VOUTB
23
VOUTA
24
AGNDA
25
RE
F
AB
26
RE
F
CD
27
NC
28
RE
F
G
ND
29
T
EM
P
30
A
V
SS
31
A
V
DD
32
BI
N/
2sCO
M
P
Figure 6. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
SYNC
Active Low Input. This is the frame synchronization signal for the serial interface. While SYNC is low, data is
transferred in on the falling edge of SCLK.
2
SCLK
Serial Clock Input. Data is clocked into the shift register on the falling edge of SCLK. This operates at clock speeds
of up to 30 MHz.
3
SDIN
Serial Data Input. Data must be valid on the falling edge of SCLK.
4
SDO
Serial Data Output. This is used to clock data from the serial register in daisy-chain or readback mode.
CLR
Negative Edge Triggered Input. Asserting this pin sets the DAC registers to 0x0000.
6
LDAC
Load DAC. Logic input. This is used to update the DAC registers and consequently the analog outputs. When tied
permanently low, the addressed DAC register is updated on the rising edge of SYNC. If LDAC is held high during
the write cycle, the DAC input register is updated but the output update is held off until the falling edge of LDAC.
In this mode, all analog outputs can be updated simultaneously on the falling edge of LDAC. The LDAC pin must
not be left unconnected.
7, 8
D0, D1
D0 and D1 form a digital I/O port. The user can set up these pins as inputs or outputs that are configurable and
readable over the serial interface. When configured as inputs, these pins have weak internal pull-ups to DVCC. When
programmed as outputs, D0 and D1 are referenced by DVCC and DGND.
9
RSTOUT
Reset Logic Output. This is the output from the on-chip voltage monitor used in the reset circuit. If desired, it can
be used to control other system components.
10
RSTIN
Reset Logic Input. This input allows external access to the internal reset logic. Applying a Logic 0 to this input
clamps the DAC outputs to 0 V. In normal operation, RSTIN should be tied to Logic 1. Register values remain
unchanged.
11
DGND
Digital Ground Pin.
12
DVCC
Digital Supply Pin. Voltage ranges from 2.7 V to 5.25 V.
13, 31
AVDD
Positive Analog Supply Pins. Voltage ranges from 4.75 V to 5.25 V.
14
PGND
Ground Reference Point for Analog Circuitry.
15, 30
AVSS
Negative Analog Supply Pins. Voltage ranges from –4.75 V to –5.25 V.
16
ISCC
This pin is used in association with an optional external resistor to AGND to program the short-circuit current of
the output amplifiers. See the Design Features section for additional details.
17
AGNDD
Ground Reference Pin for the DAC D Output Amplifier.
18
VOUTD
Analog Output Voltage of DAC D. This provides buffered output with a nominal full-scale output range of ±4.096 V. The
output amplifier is capable of directly driving a 5 k, 200 pF load.
相關(guān)PDF資料
PDF描述
VI-B4Y-MX-B1 CONVERTER MOD DC/DC 3.3V 49.5W
LTC2704CGW-12#TRPBF IC DAC 12BIT QUAD VOUT 44-SSOP
AD7537KNZ IC DAC 12BIT DUAL MULT 24DIP
VE-260-IV-F4 CONVERTER MOD DC/DC 5V 150W
VI-B4Y-MW-B1 CONVERTER MOD DC/DC 3.3V 66W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD5766BCBZ-RL7 功能描述:16 CHANNEL 16 BIT BIPOLAR DAC 制造商:analog devices inc. 系列:- 零件狀態(tài):在售 位數(shù):16 數(shù)模轉(zhuǎn)換器數(shù):16 建立時(shí)間:12μs 輸出類型:Voltage - Unbuffered 差分輸出:無(wú) 數(shù)據(jù)接口:SPI，DSP 參考類型:外部 電壓 - 電源，模擬:2.97 V ~ 16 V 電壓 - 電源，數(shù)字:- INL/DNL（LSB）:±16，±1 架構(gòu):電阻串 DAC 工作溫度:-40°C ~ 105°C 封裝/外殼:49-UFBGA，WLCSP 供應(yīng)商器件封裝:49-WLCSP 標(biāo)準(zhǔn)包裝:1
AD5767BCBZ-RL7 功能描述:16 CHANNEL 12 BIT BIPOLAR DAC 制造商:analog devices inc. 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 位數(shù):12 數(shù)模轉(zhuǎn)換器數(shù):16 建立時(shí)間:12μs 輸出類型:Voltage - Unbuffered 差分輸出:無(wú) 數(shù)據(jù)接口:SPI，DSP 參考類型:外部 電壓 - 電源，模擬:2.97 V ~ 16 V 電壓 - 電源，數(shù)字:- INL/DNL（LSB）:±1，±1 架構(gòu):電阻串 DAC 工作溫度:-40°C ~ 105°C 封裝/外殼:49-UFBGA，WLCSP 供應(yīng)商器件封裝:49-WLCSP 標(biāo)準(zhǔn)包裝:1
AD5767BCPZ-RL7 功能描述:16 CHANNEL 12 BIT BIPOLAR DAC 制造商:analog devices inc. 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 位數(shù):12 數(shù)模轉(zhuǎn)換器數(shù):16 建立時(shí)間:12μs 輸出類型:Voltage - Unbuffered 差分輸出:無(wú) 數(shù)據(jù)接口:SPI，DSP 參考類型:外部 電壓 - 電源，模擬:2.97 V ~ 16 V 電壓 - 電源，數(shù)字:- INL/DNL（LSB）:±1，±1 架構(gòu):電阻串 DAC 工作溫度:-40°C ~ 105°C 封裝/外殼:40-WFQFN 裸露焊盤，CSP 供應(yīng)商器件封裝:40-LFCSP（6x6） 標(biāo)準(zhǔn)包裝:1
AD578 制造商:AD 制造商全稱:Analog Devices 功能描述:VERY FAST, COMPLETE 10- OR 12-BIT A/D CONVERTERS
AD5780 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultra Stable, 16-Bit ±0.5 LSB INL
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*