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參數(shù)資料
| 型號： | AD6655BCPZ-1251 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | IF Diversity Receiver |
| 中文描述： | IF分集接收機(jī) |
| 文件頁數(shù)： | 18/84頁 |
| 文件大小： | 2012K |
| 代理商： | AD6655BCPZ-1251 |
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AD6655
ABSOLUTE MAXIMUM RATINGS
Table 10.
Parameter
ELECTRICAL
AVDD, DVDD to AGND
DRVDD to DRGND
AGND to DRGND
VIN+A/VIN+B, VIN-A/VINB to AGND
CLK+, CLK to AGND
SYNC to AGND
VREF to AGND
SENSE to AGND
CML to AGND
RBIAS to AGND
CSB to AGND
SCLK/DFS to DRGND
SDIO/DCS to DRGND
SMI SDO/OEB to DRGND
SMI SCLK/PDWN to DRGND
SMI SDFS to DRGND
D0A/D0B through D13A/D13B
to DRGND
FD0A/FD0B through FD3A/FD3B to
DRGND
DCOA/DCOB to DRGND
ENVIRONMENTAL
Operating Temperature Range
(Ambient)
Maximum Junction Temperature
Under Bias
Storage Temperature Range
(Ambient)
Rev. 0 | Page 18 of 84
Rating
0.3 V to +2.0 V
0.3 V to +3.9 V
0.3 V to +0.3 V
0.3 V to AVDD + 0.2 V
0.3 V to +3.9 V
0.3 V to +3.9 V
0.3 V to AVDD + 0.2 V
0.3 V to AVDD + 0.2 V
0.3 V to AVDD + 0.2 V
0.3 V to AVDD + 0.2 V
0.3 V to +3.9 V
0.3 V to +3.9 V
0.3 V to DRVDD + 0.3 V
0.3 V to DRVDD + 0.3 V
0.3 V to DRVDD + 0.3 V
0.3 V to DRVDD + 0.3 V
0.3 V to DRVDD + 0.3 V
0.3 V to DRVDD + 0.3 V
0.3 V to DRVDD + 0.3 V
40°C to +85°C
150°C
65°C to +125°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL CHARACTERISTICS
The exposed paddle must be soldered to the ground plane for
the LFCSP package. Soldering the exposed paddle to the
customer board increases the reliability of the solder joints,
maximizing the thermal capability of the package.
Table 11. Thermal Resistance
Package
Type
64-Lead LFCSP
9 mm × 9 mm
(CP-64-3)
Airflow
Velocity
(m/s)
0
1.0
2.0
θ
JA1, 2
18.8
16.5
15.8
θ
JC1, 3
0.6
θ
JB1, 4
6.0
Unit
°C/W
°C/W
°C/W
1
Per JEDEC 51-7, plus JEDEC 25-5 2S2P test board.
2
Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air).
3
Per MIL-Std 883, Method 1012.1.
4
Per JEDEC JESD51-8 (still air).
Typical θ
JA
is specified for a 4-layer PCB with solid ground
plane. As shown, airflow increases heat dissipation, which
reduces θ
JA
. In addition, metal in direct contact with the
package leads from metal traces, through holes, ground, and
power planes, reduces the θ
JA
.
ESD CAUTION
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