參數(shù)資料
型號(hào)： AD6655BCPZ-1251
廠商： Analog Devices, Inc.
英文描述： IF Diversity Receiver
中文描述： IF分集接收機(jī)
文件頁(yè)數(shù)： 31/84頁(yè)
文件大?。?/td> 2012K
代理商： AD6655BCPZ-1251
AD6655
Single-Ended Input Configuration
A single-ended input can provide adequate performance in
cost-sensitive applications. In this configuration, SFDR and
distortion performance degrade due to the large input common-
mode swing. If the source impedances on each input are matched,
there should be little effect on SNR performance. Figure 51 shows
a typical single-ended input configuration.
Rev. 0 | Page 31 of 84
2V p-p
R
R
C
49.9
0.1μF
10μF
10μF
0.1μF
AVDD
1k
1k
1k
1k
AD6655
AVDD
VIN+
VIN–
0
Figure 51. Single-Ended Input Configuration
VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD6655.
The input range can be adjusted by varying the reference voltage
applied to the AD6655, using either the internal reference or an
externally applied reference voltage. The input span of the ADC
tracks reference voltage changes linearly. The various reference
modes are summarized in the sections that follow. The Reference
Decoupling section describes the best practices PCB layout of
the reference.
Internal Reference Connection
A comparator within the AD6655 detects the potential at the
SENSE pin and configures the reference into four possible modes,
which are summarized in Table 15. If SENSE is grounded, the
reference amplifier switch is connected to the internal resistor
divider (see Figure 52), setting VREF to 1.0 V. Connecting the
SENSE pin to VREF switches the reference amplifier output to
the SENSE pin, completing the loop and providing a 0.5 V
reference output. If a resistor divider is connected externally
to the chip, as shown in Figure 53, the switch again sets to the
SENSE pin.
This puts the reference amplifier in a noninverting mode with
the VREF output defined as follows:
1
×
=
R1
R2
VREF
5
The input range of the ADC always equals twice the voltage at
the reference pin for either an internal or an external reference.
VREF
SENSE
0.5V
AD6655
SELECT
LOGIC
0.1μF
1.0μF
VIN–A/VIN–B
VIN+A/VIN+B
ADC
CORE
0
Figure 52. Internal Reference Configuration
0.5V
AD6655
SELECT
LOGIC
VIN–A/VIN–B
VIN+A/VIN+B
ADC
CORE
VREF
SENSE
0.1μF
1.0μF
R2
R1
0
Figure 53. Programmable Reference Configuration
Table 15. Reference Configuration Summary
Selected Mode
External Reference
Internal Fixed Reference
SENSE Voltage
AVDD
VREF
Resulting VREF (V)
N/A
0.5
+
×
1
5
Resulting Differential
Span (V p-p)
2 × external reference
1.0
Programmable Reference
0.2 V to VREF
R1
R2
(see Figure 53)
2 × VREF
Internal Fixed Reference
AGND to 0.2 V
1.0
2.0
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