- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10089 > AD7612BCPZ-RL (Analog Devices Inc)IC ADC 16BIT 750KSPS SAR 48LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD7612BCPZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT 750KSPS SAR 48LFCSP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | PulSAR® |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 750k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 230mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)差分，雙極 |
| 配用： | EVAL-AD7612CBZ-ND - BOARD EVALUATION FOR AD7612 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當(dāng)前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
Data Sheet
AD7612
Rev. A | Page 23 of 32
Power Sequencing
The AD7612 requires sequencing of the AVDD and DVDD
supplies. AVDD should come up prior to or simultaneously
with DVDD. This can be achieved using the configuration in
Figure 27 or sequencing the supplies in that manner. The
other supplies can be sequenced as desired as long as absolute
maximum ratings are observed. The AD7612 is very insensitive
to power supply variations on AVDD over a wide frequency
range, as shown in Figure 31.
80
75
1
10000
FREQUENCY (kHz)
PSR
R
(d
B
)
10
100
1000
70
65
60
55
50
45
40
35
30
EXT REF
INT REF
0
62
65
-0
31
Figure 31. AVDD PSRR vs. Frequency
Power Dissipation vs. Throughput
In impulse mode, the AD7612 automatically reduces its power
consumption at the end of each conversion phase. During the
acquisition phase, the operating currents are very low, which allows
a significant power savings when the conversion rate is reduced
(see Figure 32). This feature makes the AD7612 ideal for very
low power, battery-operated applications.
It should be noted that the digital interface remains active even
during the acquisition phase. To reduce the operating digital supply
currents even further, drive the digital inputs close to the power
rails (that is, OVDD and OGND).
1000
1
1000
SAMPLING RATE (kSPS)
P
O
W
E
R
DI
S
IP
AT
IO
N
(
m
W
)
10
100
10
100
WARP MODE POWER
IMPULSE MODE POWER
PDREF = PDBUF = HIGH
06
26
5-
0
32
Figure 32. Power Dissipation vs. Sample Rate
Power Down
Setting PD = high powers down the AD7612, thus reducing
supply currents to their minimums as shown in Figure 23. When
the ADC is in power down, the current conversion (if any) is
completed and the digital bus remains active. To further reduce
the digital supply currents, drive the inputs to OVDD or OGND.
Power down can also be programmed with the configuration
register. See the Software Configuration section for details. Note
that when using the configuration register, the PD input is a
don’t care and should be tied to either high or low.
CONVERSION CONTROL
The AD7612 is controlled by the CNVST input. A falling edge
on CNVST is all that is necessary to initiate a conversion. Detailed
timing diagrams of the conversion process are shown in Figure 33.
Once initiated, it cannot be restarted or aborted, even by the
power-down input, PD, until the conversion is complete. The
CNVST signal operates independently of CS and RD signals.
BUSY
MODE
CONVERT
ACQUIRE
CONVERT
CNVST
t1
t2
t4
t3
t5
t6
t7
t8
0
6265-
033
Figure 33. Basic Conversion Timing
Although CNVST is a digital signal, it should be designed with
special care with fast, clean edges, and levels with minimum
overshoot, undershoot, or ringing.
The CNVST trace should be shielded with ground and a low value
(such as 50 Ω) serial resistor termination should be added close
to the output of the component that drives this line.
For applications where SNR is critical, the CNVST signal should
have very low jitter. This can be achieved by using a dedicated
oscillator for CNVST generation, or by clocking CNVST with a
high frequency, low jitter clock, as shown in Figure 27.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MS27467E17A35PB | CONN PLUG 55POS STRAIGHT W/PINS |
| LTC1480IS8#TR | IC TXRX RS485 3.3V ULT LP 8SOIC |
| VE-B62-MW-F2 | CONVERTER MOD DC/DC 15V 100W |
| VI-2TZ-MY | CONVERTER MOD DC/DC 2V 20W |
| IDT72241L15PF8 | IC FIFO 2048X18 SYNC 15NS 32QFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7612BST | 制造商:Analog Devices 功能描述:ADC 16BIT 750KSPS SAR 48-LQFP 制造商:Analog Devices 功能描述:ADC, 16BIT, 750KSPS, SAR, 48-LQFP |
| AD7612BSTZ | 功能描述:IC ADC 16BIT 750KSPS SAR 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7612BSTZ-RL | 功能描述:IC ADC 16BIT 750KSPS SAR 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極 |
| AD7616BSTZ | 功能描述:16 Bit Analog to Digital Converter 16 Input 2 SAR 80-LQFP (14x14) 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):在售 位數(shù):16 采樣率（每秒）:1M 輸入數(shù):16 輸入類型:差分 數(shù)據(jù)接口:SPI，并聯(lián)，DSP 配置:MUX-S/H-ADC 無線電 - S/H:ADC:1:1 A/D 轉(zhuǎn)換器數(shù):2 架構(gòu):SAR 參考類型:外部， 內(nèi)部 電壓 - 電源，模擬:5V 電壓 - 電源，數(shù)字:2.3 V ~ 3.6 V 特性:同步采樣 工作溫度:-40°C ~ 125°C 封裝/外殼:80-LQFP 供應(yīng)商器件封裝:80-LQFP（14x14） 標(biāo)準(zhǔn)包裝:1 |
| AD7616BSTZ-RL | 功能描述:16 Bit Analog to Digital Converter 16 Input 2 SAR 80-LQFP (14x14) 制造商:analog devices inc. 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 位數(shù):16 采樣率（每秒）:1M 輸入數(shù):16 輸入類型:差分 數(shù)據(jù)接口:SPI，并聯(lián)，DSP 配置:MUX-S/H-ADC 無線電 - S/H:ADC:1:1 A/D 轉(zhuǎn)換器數(shù):2 架構(gòu):SAR 參考類型:外部， 內(nèi)部 電壓 - 電源，模擬:5V 電壓 - 電源，數(shù)字:2.3 V ~ 3.6 V 特性:同步采樣 工作溫度:-40°C ~ 125°C 封裝/外殼:80-LQFP 供應(yīng)商器件封裝:80-LQFP（14x14） 標(biāo)準(zhǔn)包裝:1 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。