參數(shù)資料
型號: AD7612BCPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 25/32頁
文件大?。?/td> 0K
描述: IC ADC 16BIT 750KSPS SAR 48LFCSP
標準包裝: 2,500
系列: PulSAR®
位數(shù): 16
采樣率(每秒): 750k
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 230mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應商設備封裝: 48-LFCSP-VQ(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個差分,雙極
配用: EVAL-AD7612CBZ-ND - BOARD EVALUATION FOR AD7612
Data Sheet
AD7612
Rev. A | Page 31 of 32
APPLICATION INFORMATION
LAYOUT GUIDELINES
While the AD7612 has very good immunity to noise on the
power supplies, exercise care with the grounding layout. To facil-
itate the use of ground planes that can be easily separated, design
the printed circuit board that houses the AD7612 so that the
analog and digital sections are separated and confined to certain
areas of the board. Digital and analog ground planes should be
joined in only one place, preferably underneath the AD7612, or
as close as possible to the AD7612. If the AD7612 is in a system
where multiple devices require analog-to-digital ground connec-
tions, the connections should still be made at one point only, a
star ground point, established as close as possible to the AD7612.
To prevent coupling noise onto the die, avoid radiating noise,
and to reduce feedthrough:
Do not run digital lines under the device.
Do run the analog ground plane under the AD7612.
Do shield fast switching signals, like CNVST or clocks, with
digital ground to avoid radiating noise to other sections of
the board, and never run them near analog signal paths.
Avoid crossover of digital and analog signals.
Run traces on different but close layers of the board, at right
angles to each other, to reduce the effect of feedthrough through
the board.
The power supply lines to the AD7612 should use as large a trace
as possible to provide low impedance paths and reduce the effect
of glitches on the power supply lines. Good decoupling is also
important to lower the impedance of the supplies presented to
the AD7612, and to reduce the magnitude of the supply spikes.
Decoupled ceramic capacitors, typically 100 nF, should be placed
on each of the power supplies pins, AVDD, DVDD, and OVDD,
VCC, and VEE. The capacitors should be placed close to, and
ideally right up against, these pins and their corresponding ground
pins. Additionally, low ESR 10 μF capacitors should be located
in the vicinity of the ADC to further reduce low frequency ripple.
The DVDD supply of the AD7612 can be either a separate supply
or come from the analog supply, AVDD, or from the digital inter-
face supply, OVDD. When the system digital supply is noisy, or
fast switching digital signals are present, and no separate supply is
available, it is recommended to connect the DVDD digital supply
to the analog supply AVDD through an RC filter, and to connect
the system supply to the interface digital supply OVDD and the
remaining digital circuitry. See Figure 27 for an example of this
configuration. When DVDD is powered from the system supply,
it is useful to insert a bead to further reduce high frequency spikes.
The AD7612 has four different ground pins: REFGND, AGND,
DGND, and OGND.
REFGND senses the reference voltage and, because it carries
pulsed currents, should be a low impedance return to the
reference.
AGND is the ground to which most internal ADC analog
signals are referenced; it must be connected with the least
resistance to the analog ground plane.
DGND must be tied to the analog or digital ground plane
depending on the configuration.
OGND is connected to the digital system ground.
The layout of the decoupling of the reference voltage is important.
To minimize parasitic inductances, place the decoupling capacitor
close to the ADC and connect it with short, thick traces.
EVALUATING PERFORMANCE
A recommended layout for the AD7612 is outlined in the EVAL-
AD7612EDZ evaluation board documentation. The evaluation
board package includes a fully assembled and tested evaluation
board, documentation, and software for controlling the board
from a PC via the EVAL-CED1Z.
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