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參數(shù)資料
| 型號： | AD7643BCPZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 18BIT DIFF W/REF 48-LFCSP |
| 產品培訓模塊： | ADC Applications ADC Architectures ADC DC/AC Performance |
| 標準包裝： | 2,500 |
| 系列： | PulSAR® |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 1.25M |
| 數(shù)據接口： | 串行，并聯(lián) |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 80mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
| 配用： | EVAL-AD7643CBZ-ND - BOARD EVALUATION FOR AD7643 |
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AD7643
Rev. 0 | Page 18 of 28
DRIVER AMPLIFIER CHOICE
Although the AD7643 is easy to drive, the driver amplifier
needs to meet the following requirements:
For multichannel, multiplexed applications, the driver
amplifier and the AD7643 analog input circuit must be
able to settle for a full-scale step of the capacitor array at an
18-bit level (0.0004%). In the amplifier’s data sheet, settling
at 0.1% to 0.01% is more commonly specified. This could
differ significantly from the settling time at an 18-bit level
and should be verified prior to driver selection. The
AD8021 op amp, which combines ultralow noise and high
gain bandwidth, meets this settling time requirement even
when used with gains up to 13.
The noise generated by the driver amplifier needs to be
kept as low as possible to preserve the SNR and transition
noise performance of the AD7643. The noise coming from
the driver is filtered by the AD7643 analog input circuit
1-pole, low-pass filter made by RIN and CIN or by the
external filter, if one is used. The SNR degradation due
to the amplifier is
()
()
+
=
+
2
π
2
π
900
30
20log
N
3dB
N
3dB
LOSS
Ne
f
Ne
f
SNR
where:
f–3dB is the input bandwidth of the AD7643 (50 MHz) or
the cutoff frequency of the input RC filter shown in Figure 23
(3.9 MHz), if one is used.
N is the noise factor of the amplifier (1 in buffer
configuration).
eN+ and eN are the equivalent input voltage noise densities
of the op amps connected to IN+ and IN, in nV/√Hz.
This approximation can be used when the resistances used
around the amplifier are small. If larger resistances are
used, their noise contributions should also be root-sum
squared.
For instance, when using op amps with an equivalent input
noise density of 2.1 nV/√Hz, such as the AD8021, with a
noise gain of 1 when configured as a buffer, degrades the
SNR by only 0.25 dB when using the RC filter in Figure 23,
and by 2.5 dB without it.
The driver needs to have a THD performance suitable to
that of the AD7643. Figure 13 gives the THD vs. frequency
that the driver should exceed.
The AD8021 meets these requirements and is appropriate for
almost all applications. The AD8021 needs a 10 pF external
compensation capacitor that should have good linearity as an
NPO ceramic or mica type. Moreover, the use of a noninverting
1 gain arrangement is recommended and helps to obtain the
best signal-to-noise ratio.
The AD8022 can also be used when a dual version is needed
and a gain of 1 is present. The AD829 is an alternative in
applications where high frequency (above 100 kHz) performance is
not required. In applications with a gain of 1, an 82 pF
compensation capacitor is required. The AD8610 is an option
when low bias current is needed in low frequency applications.
Single-to-Differential Driver
For applications using unipolar analog signals, a single-ended-
to-differential driver, as shown in Figure 27, allows for a
differential input into the part. This configuration, when
provided an input signal of 0 to VREF, produces a differential
±VREF with midscale at VREF/2. The 1-pole filter using R = 15 Ω
and C = 2.7 nF provides a corner frequency of 3.9 MHz.
If the application can tolerate more noise, the AD8139
differential driver can be used.
AD8021
ANALOG INPUT
(UNIPOLAR 0V TO 2.048V)
AD8021
IN+
IN–
AD7643
REF
10F
15
100nF
2.7nF
U2
U1
10pF
5k
590
0
602
4-
027
Figure 27. Single-Ended-to-Differential Driver Circuit
(Internal Reference Buffer Used)
VOLTAGE REFERENCE INPUT
The AD7643 allows the choice of either a very low temperature
drift internal voltage reference, an external 1.2 V reference that
can be buffered using the internal reference buffer, or an
external reference.
Unlike many ADCs with internal references, the internal
reference of the AD7643 provides excellent performance and
can be used in almost all applications.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7643BSTZ | 功能描述:IC ADC 18BIT DIFFER W/REF 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據采集 - 模數(shù)轉換器 系列:PulSAR® 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據接口:并聯(lián) 轉換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7643BSTZRL | 功能描述:IC ADC 18BIT DIFFER W/REF 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據采集 - 模數(shù)轉換器 系列:PulSAR® 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據接口:串行，并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7645AQ | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit Buffered Miltiplying CMOS D/A Converter |
| AD7645BQ | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit Buffered Miltiplying CMOS D/A Converter |
| AD7645CQ | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit Buffered Miltiplying CMOS D/A Converter |
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