參數(shù)資料
型號: AD7654ASTZ
廠商: Analog Devices Inc
文件頁數(shù): 6/28頁
文件大?。?/td> 0K
描述: IC ADC 16BIT 500KSPS DUAL 48LQFP
標準包裝: 1
系列: PulSAR®
位數(shù): 16
采樣率(每秒): 500k
數(shù)據接口: 串行,并聯(lián)
轉換器數(shù)目: 1
功率耗散(最大): 135mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 托盤
輸入數(shù)目和類型: 2 個差分,單極
產品目錄頁面: 778 (CN2011-ZH PDF)
配用: EVAL-AD7654CBZ-ND - BOARD EVALUATION FOR AD7654
AD7654
Rev. B | Page 14 of 28
APPLICATION INFORMATION
CIRCUIT INFORMATION
The AD7654 is a very fast, low power, single-supply, precise,
simultaneous sampling 16-bit ADC.
The AD7654 provides the user with two on-chip, track-and-
hold, successive approximation ADCs that do not exhibit any
pipeline or latency, making it ideal for multiple multiplexed
channel applications. The AD7654 can also be used as a
4-channel ADC with two pairs simultaneously sampled.
The AD7654 can be operated from a single 5 V supply and be
interfaced to either 5 V or 3 V digital logic. It is housed in a
48-lead LQFP or tiny 48-lead LFCSP that combines space
savings and allows flexible configurations as either a serial or
parallel interface. The AD7654 is pin-to-pin compatible with
PulSAR ADCs.
MODES OF OPERATION
The AD7654 features two modes of operation, normal and
impulse. Each of these modes is more suitable for specific
applications.
Normal mode is the fastest mode (500 kSPS). Except when it is
powered down (PD = HIGH), the power dissipation is almost
independent of the sampling rate.
Impulse mode, the lowest power dissipation mode, allows
power saving between conversions. The maximum
throughput in this mode is 444 kSPS. When operating at
10 kSPS, for example, it typically consumes only 2.6 mW. This
feature makes the AD7654 ideal for battery-powered
applications.
TRANSFER FUNCTIONS
The AD7654 data format is straight binary. The ideal transfer
characteristic for the AD7654 is shown in Figure 17 and Table 7.
The LSB size is 2*VREF/65536, which is about 76.3 μV.
000...000
000...001
000...010
111...101
111...110
111...111
ANALOG INPUT
+FS – 1.5 LSB
+FS – 1 LSB
–FS + 1 LSB
–FS
–FS + 0.5 LSB
ADC
CO
DE
(
S
tr
ai
g
h
tBi
n
ar
y)
03
05
7-
0
17
Figure 17. ADC Ideal Transfer Function
Table 7. Output Codes and Ideal Input Voltages
Description
Analog Input
VREF = 2.5 V
Digital Output Code
FSR 1 LSB
4.999924 V
FSR 2 LSB
4.999847 V
0xFFFE
Midscale + 1 LSB
2.500076 V
0x8001
Midscale
2.5 V
0x8000
Midscale 1 LSB
2.499924 V
0x7FFF
FSR + 1 LSB
76.29 μV
0x0001
FSR
0 V
1 This is also the code for overrange analog input
(VINx – VINxN above 2 × (VREF VREFGND)).
2 This is also the code for underrange analog input (VINx below VINxN).
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