參數(shù)資料
型號: AD7654ASTZ
廠商: Analog Devices Inc
文件頁數(shù): 9/28頁
文件大?。?/td> 0K
描述: IC ADC 16BIT 500KSPS DUAL 48LQFP
標準包裝: 1
系列: PulSAR®
位數(shù): 16
采樣率(每秒): 500k
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 135mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
輸入數(shù)目和類型: 2 個差分,單極
產(chǎn)品目錄頁面: 778 (CN2011-ZH PDF)
配用: EVAL-AD7654CBZ-ND - BOARD EVALUATION FOR AD7654
AD7654
Rev. B | Page 17 of 28
The AD8021 meets these requirements and is usually appro-
priate for almost all applications. The AD8021 needs an
external compensation capacitor of 10 pF. This capacitor should
have good linearity as an NPO ceramic or mica type. The
AD8022 could be used where a dual version is needed and a
gain of +1 is used.
The AD829 is another alternative where high frequency
(above 100 kHz) performance is not required. In a gain of +1,
it requires an 82 pF compensation capacitor.
The AD8610 is another option where low bias current is needed
in low frequency applications.
Refer to Table 8 for some recommended op amps.
Table 8. Recommended Driver Amplifiers
Amplifier
Typical Application
ADA4841
Very low noise, low distortion, low power,
low frequency
AD829
Very low noise, low frequency
AD8021
Very low noise, high frequency
AD8022
Very low noise, high frequency, dual
AD8655/AD8656
Low noise, 5 V single supply, low power,
low frequency, single/dual
AD8610/AD8620
Low bias current, low frequency,
single/dual
VOLTAGE REFERENCE INPUT
The AD7654 requires an external 2.5 V reference. The reference
input should be applied to REF, REFA, and REFB. The voltage
reference input REF of the AD7654 has a dynamic input
impedance; it should therefore be driven by a low impedance
source with an efficient decoupling. This decoupling depends
on the choice of the voltage reference but usually consists of a
1 μF ceramic capacitor and a low ESR tantalum capacitor
connected to the REFA, REFB, and REFGND inputs with
minimum parasitic inductance. A value of 47 μF is an appro-
priate value for the tantalum capacitor when using one of the
recommended reference voltages:
The low noise, low temperature drift AD780, AD361,
ADR421, and ADR431 voltage reference.
The low cost AD1582 voltage reference.
For applications using multiple AD7654s with one voltage
reference source, it is recommended that the reference source
drives each ADC in a star configuration with individual
decoupling placed as close as possible to the REF/REFGND
inputs. Also, it is recommended that a buffer, such as the
AD8031/AD8032, be used in this configuration.
Care should be taken with the reference temperature coefficient
of the voltage reference, which directly affects the full-scale
accuracy if this parameter is applicable. For instance, a
15 ppm/°C tempco of the reference changes the full-scale
accuracy by 1 LSB/°C.
POWER SUPPLY
The AD7654 uses three sets of power supply pins: an analog
5 V supply AVDD, a digital 5 V core supply DVDD, and a
digital input/output interface supply OVDD. The OVDD
supply allows direct interface with any logic working between
2.7 V and DVDD + 0.3 V. To reduce the number of supplies
needed, the digital core (DVDD) can be supplied through a
simple RC filter from the analog supply, as shown in Figure 18.
The AD7654 is independent of power supply sequencing, once
OVDD does not exceed DVDD by more than 0.3 V, and thus
free from supply voltage induced latch-up. Additionally, it is
very insensitive to power supply variations over a wide
frequency range, as shown in Figure 20.
FREQUENCY (kHz)
40
P
S
RR
(
d
B)
100
1000
10000
45
50
55
60
65
70
10
1
03
05
7-
0
20
Figure 20. PSRR vs. Frequency
POWER DISSIPATION
In impulse mode, the AD7654 automatically reduces its power
consumption at the end of each conversion phase. During the
acquisition phase, the operating currents are very low, which
allows significant power savings when the conversion rate is
reduced, as shown in Figure 21. This feature makes the AD7654
ideal for very low power battery applications.
Note that the digital interface remains active even during the
acquisition phase. To reduce the operating digital supply
currents even further, the digital inputs need to be driven close
to the power rails (that is, DVDD and DGND), and OVDD
should not exceed DVDD by more than 0.3 V.
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