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參數(shù)資料
| 型號(hào)： | AD7711ARZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 24BIT RTD I SOURCE 24SOIC |
| 標(biāo)準(zhǔn)包裝： | 400 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 1.03k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 52.5mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 80°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)單端，單極；1 個(gè)單端，雙極；1 個(gè)差分，單極；1 個(gè)差分，雙極 |
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REV. G
–24–
AD7711
SIMPLIFYING THE EXTERNAL CLOCKING MODE
INTERFACE
In many applications, the user may not need to write to the
on-chip calibration registers. In this case, the serial interface to
the AD7711 in external clocking mode can be simplified by
connecting the
TFS line to the A0 input of the AD7711 (see
Figure 14). This means that any write to the device will load
data to the control register (because A0 is low while
TFS is
low), and any read to the device will access data from the output
data register or from the calibration registers (because A0 is high
while
RFS is low). Note that in this arrangement, the user does
not have the capability of reading from the control register.
AD7711
RFS
SDATA
SCLK
TFS
A0
FOUR
INTERFACE
LINES
Figure 14. Simplified Interface with
TFS Connected to A0
Another method of simplifying the interface is to generate the
TFS signal from an inverted RFS signal. However, generating
the signals the opposite way around (
RFS from an inverted
TFS) will cause writing errors.
MICROCOMPUTER/MICROPROCESSOR INTERFACING
The AD7711’s flexible serial interface allows easy interface to
most microcomputers and microprocessors. Figure 15 shows a
flowchart for a typical programming sequence for reading data
from the AD7711 to a microcomputer, while Figure 16 shows a
flowchart for writing data to the AD7711. Figures 17, 18, and
19 show some typical interface circuits.
Figure 15 shows continuous read operations from the AD7711
output register where the
DRDY line is continuously polled.
Depending on the microprocessor configuration, the
DRDY line
may come to an interrupt input, in which case
DRDY will auto-
matically generate an interrupt without being polled. The read-
ing of the serial buffer could be anything from one read
operation up to three read operations (where 24 bits of data
are read into an 8-bit serial register). A read operation to the
control/calibration registers is similar, but, in this case, the status
of
DRDY can be ignored. The A0 line is brought low when the
RFS line is brought low during a read from the control register.
The flowchart also shows the bits being reversed after they have
been read in from the serial port. This depends on whether the
microprocessor expects the MSB of the word first or the LSB of
the word first. The AD7711 outputs the MSB first.
NO
YES
BRING
RFS LOW
3
REVERSE
ORDER OF BITS
BRING
RFS HIGH
POLL DRDY
CONFIGURE AND
INITIALIZE
C/ P
SERIAL PORT
DRDY
LOW?
BRING
RFS, TFS HIGH
START
READ
SERIAL BUFFER
Figure 15. Flowchart for Continuous Read Operations
to the AD7711
Figure 16 shows a single 24-bit write operation to the AD7711
control or calibration registers. This shows data being transferred
from data memory to the accumulator before being written to
the serial buffer. Some microprocessor systems allow data to be
written directly to the serial buffer from data memory. Writing
data to the serial buffer from the accumulator generally consists
of either two or three write operations, depending on the size of
the serial buffer.
Figure 16 also shows the option of the bits being reversed before
being written to the serial buffer, which depends on whether the
first bit transmitted by the microprocessor is the MSB or the
LSB. The AD7711 expects the MSB as the first bit in the data
stream. In cases where the data is being read or being written in
bytes and the data has to be reversed, the bits have to be reversed
for every byte.
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