參數(shù)資料
型號: AD7764BRUZ
廠商: Analog Devices Inc
文件頁數(shù): 10/33頁
文件大?。?/td> 0K
描述: IC ADC 24BIT S/D 312KSPS 28TSSOP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 24
采樣率(每秒): 312k
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 371mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 管件
輸入數(shù)目和類型: 1 個差分,單極;1 個差分,雙極
產(chǎn)品目錄頁面: 779 (CN2011-ZH PDF)
AD7764
Rev. A | Page 17 of 32
AD7764 ANTIALIAS PROTECTION
The decimation of the AD7764, along with its counterparts in
the AD776x family, namely the AD7760, AD7762, AD7763, and
AD7765, provides top of the range antialias protection.
The decimation filter of the AD7764 features more than 115 dB
of attenuation across the full stop band, which ranges from the
Nyquist frequency, namely ODR/2, up to ICLK – ODR/2
(where ODR is the output data rate). Starting the stop band at
the Nyquist frequency prevents any signal component above
Nyquist (and up to ICLK – ODR/2) from aliasing into the
desired signal bandwidth.
Figure 32 shows the frequency response of the decimation filter
when the AD7764 is operated with a 40 MHz MCLK in
decimate × 128 mode. Note that the first stop-band frequency
occurs at Nyquist. The frequency response of the filter scales
with both the decimation rate chosen and the MCLK frequency
applied. When using low power mode, the modulator sample
rate is MCLK/4.
Taking as an example the AD7764 in normal power and in
decimate × 128 mode, the first possible alias frequency is at the
ICLK frequency minus the pass band of the digital filter (see
NYQUIST = 78kHz
ODR = 156kHz
MODULATOR
SAMPLING RATE =
MCLK/2 = 20MHz
FIRST ALIAS POINT
20MHz TO 78kHz
SIMPLFIES ANTIALIAS
FILTER ROLL-OFF REQUIRED
DIGITAL FILTER
RESPONSE
FREQUENCY
(Hz)
DIGITAL FILTER
RESPONSE IMAGE
NOISE SHAPING
AM
P
L
IT
UDE
(
d
B)
NO ALIASING OF SIGNALS
INTO PASSBAND AROUND
NYQUIST FREQUENCY
06518-
213
Figure 33. Antialias Example Using the AD7764 in Normal Mode,
Decimate × 128 Using MCLK/2 = ICLK = 20 MHz
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