參數(shù)資料
型號(hào)： AD7853ANZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 3/34頁(yè)
文件大小： 0K
描述： IC ADC 12BIT SRL 200KSPS 24-DIP
產(chǎn)品變化通告： Product Discontinuance 27/Oct/2011
標(biāo)準(zhǔn)包裝： 15
位數(shù)： 12
采樣率（每秒）： 200k
數(shù)據(jù)接口： 8051，QSPI?，串行，SPI? µP
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 33mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 通孔
封裝/外殼： 24-DIP（0.300"，7.62mm）
供應(yīng)商設(shè)備封裝： 24-PDIP
包裝： 管件
輸入數(shù)目和類型： 1 個(gè)偽差分，單極；1 個(gè)偽差分，雙極
REV. B
–11–
AD7853/AD7853L
STATUS REGISTER
The arrangement of the status register is shown below. The status register is a read-only register and contains 16 bits of data. The
status register is selected by first writing to the control register and putting two 1s in RDSLT1 and RDSLT0. The function of the
bits in the status register are described below. The power-up status of all bits is 0.
WRITE TO CONTROL REGISTER
SETTING RDSLT0 = RDSLT1 = 1
START
READ STATUS REGISTER
Figure 6. Flowchart for Reading the Status Register
MSB
ZERO
BUSY
ZERO
PMGT1
PMGT0
RDSLT1
RDSLT0
2/
3 MODE
X
CALMD
CALSLT1
CALSLT0
STCAL
LSB
Status Register Bit Function Descriptions
Bit
Mnemonic
Comment
15
ZERO
This bit is always 0.
14
BUSY
Conversion/Calibration Busy Bit. When this bit is 1, it indicates that there is a conversion or calibration in
progress. When this bit is 0, no conversion or calibration is in progress.
13
ZERO
These four bits are always 0.
12
ZERO
11
ZERO
10
ZERO
9
PMGT1
Power Management Bits. These bits, along with the
SLEEP pin, will indicate whether or not the part is in a
8
PMGT0
power-down mode. See Table VI in Power-Down Section for description.
7
RDSLT1
Both of these bits are always 1, indicating it is the status register that is being read. See Table II.
6
RDSLT0
52/
3 MODE
Interface Mode Select Bit. With this bit at 0, the device is in Interface Mode 2. With this bit at 1, the device
is in Interface Mode 1. This bit is reset to 0 after every read cycle.
4
X
Don’t care bit.
3
CALMD
Calibration Mode Bit. A 0 in this bit indicates a self-calibration is selected; a 1 in this bit indicates a system
calibration is selected (see Table III).
2
CALSLT1
Calibration Selection Bits and Start Calibration Bit. The STCAL bit is read as a 1 if a calibration is in
1
CALSLT0
progress and as a 0 if no calibration is in progress. The CALSLT1 and CALSLT0 bits indicate
0
STCAL
which of the calibration registers are addressed for reading and writing (see section on the Calibration
Registers for more details).
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參數(shù)描述
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