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參數(shù)資料
| 型號： | AD7949BCPZRL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/32頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 250KSPS 8CH 20LFCSP |
| 產(chǎn)品培訓模塊： | Power Line Monitoring |
| 產(chǎn)品變化通告： | Startup Circuitry Design Improvement Change 15/April/2009 |
| 標準包裝： | 1,500 |
| 系列： | PulSAR® |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 15.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 20-LFCSP-VQ |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | * |
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Data Sheet
AD7949
Rev. D | Page 23 of 32
READING/WRITING SPANNING CONVERSION, ANY
SPEED HOST
When reading/writing spanning conversion, the data access starts
at the current acquisition (n) and spans into the conversion (n).
Conversion results are for the previous (n 1) conversion, and
writing the CFG register is for the next (n + 1) acquisition and
conversion.
Similar to reading/writing during conversion, reading/writing
should only occur up to tDATA. For the maximum throughput,
the only time restriction is that reading/writing take place
during the tACQ + tDATA time.
For slow throughputs, the time restriction is dictated by the
user’s required throughput, and the host is free to run at any
speed. Similar to reading/writing during acquisition, for slow
hosts, the data access must take place during the acquisition
phase with additional time into the conversion.
Note that data access spanning conversion requires the CNV to
be driven high to initiate a new conversion, and data access is
not allowed when CNV is high. Thus, the host must perform
two bursts of data access when using this method.
CONFIGURATION REGISTER, CFG
The AD7949 uses a 14-bit configuration register (CFG[13:0]),
as detailed in Table 9, to configure the inputs, the channel to be
converted, the one-pole filter bandwidth, the reference, and the
channel sequencer. The CFG register is latched (MSB first) on
DIN with 14 SCK rising edges. The CFG update is edge depen-
dent, allowing for asynchronous or synchronous hosts.
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| AD7949SCPZ-EP-R2 | 功能描述:14 Bit Analog to Digital Converter 8 Input 1 SAR 20-LFCSP-WQ (4x4) 制造商:analog devices inc. 系列:PulSAR? 包裝:剪切帶（CT） 零件狀態(tài):有效 位數(shù):14 采樣率（每秒）:256k 輸入數(shù):8 輸入類型:差分，單端 數(shù)據(jù)接口:SPI，DSP 配置:MUX-ADC 無線電 - S/H:ADC:- A/D 轉(zhuǎn)換器數(shù):1 架構(gòu):SAR 參考類型:外部， 內(nèi)部 電壓 - 電源，模擬:2.3 V ~ 5.5 V 電壓 - 電源，數(shù)字:2.3 V ~ 5.5 V 特性:溫度傳感器 工作溫度:-55°C ~ 125°C 封裝/外殼:20-WFQFN 裸露焊盤，CSP 供應商器件封裝:20-LFCSP-WQ（4x4） 標準包裝:1 |
| AD7949SCPZ-EP-RL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 250ksps 14-bit Serial 20-Pin LFCSP EP T/R 制造商:Analog Devices 功能描述:8 CH 250KSPS 14BIT ADC IC - Tape and Reel 制造商:Analog Devices 功能描述:IC ADC 14BIT 8CH 250KSPS 20LFCSP 制造商:Analog Devices 功能描述:Analog to Digital Converters - ADC 14-Bit 8CH 250 kSPS 制造商:Analog Devices 功能描述:CONVERTER - ADC |
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| AD795_02 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Low Noise Precision FET Op Amp |
| AD795_09 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Low Noise Precision FET Op Amp |
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