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| 型號(hào)： | AD7952BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT DIFF 1MSPS 48LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PulSAR® |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 260mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個(gè)差分，雙極 |
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AD7952
Data Sheet
Rev. A | Page 20 of 32
ANALOG INPUTS
Input Range Selection
In parallel mode and serial hardware mode, the input range is
selected by using the BIPOLAR (bipolar) and TEN (10 V range)
Configuration section and Software Configuration section for
programming the mode selection with either pins or the
configuration register. Note that when using the configuration
register, the BIPOLAR and TEN inputs are don’t cares and
should be tied high or low.
Input Structure
Figure 28 shows an equivalent circuit for the input structure of
the AD7952.
D1
RIN
CIN
D2
IN+ OR IN–
VEE
VCC
CPIN
AGND
D3
D4
AVDD
0V TO 5V
RANGE ONLY
0
65
89
-0
28
Figure 28. Simplified Analog Input
The four diodes, D1 to D4, provide ESD protection for the analog
inputs, IN+ and IN. Care must be taken to ensure that the analog
input signal never exceeds the supply rails by more than 0.3 V
because this causes the diodes to become forward-biased and to
start conducting current. These diodes can handle a forward-
biased current of 120 mA maximum. For instance, these conditions
could eventually occur when the input buffer’s U1 supplies are
different from AVDD, VCC, and VEE. In such a case, an input
buffer with a short-circuit current limitation can be used to protect
the part although most op amps’ short-circuit current is <100 mA.
Note that D3 and D4 are only used in the 0 V to 5 V range to
allow for additional protection in applications that are switching
from the higher voltage ranges.
This analog input structure allows the sampling of the differential
signal between IN+ and IN. By using this differential input,
small signals common to both inputs are rejected as shown in
Figure 29, which represents the typical CMRR over frequency.
For instance, by using IN to sense a remote signal ground,
ground potential differences between the sensor and the local
ADC ground are eliminated.
100
0
1
10000
FREQUENCY (kHz)
CM
RR
(
d
B
)
90
80
70
60
50
40
30
20
10
100
1000
06
58
9-
0
29
Figure 29. Analog Input CMRR vs. Frequency
During the acquisition phase for ac signals, the impedance of
the analog inputs, IN+ and IN, can be modeled as a parallel
combination of Capacitor CPIN and the network formed by
the series connection of RIN and CIN. CPIN is primarily the pin
capacitance. RIN is typically 70 Ω and is a lumped component
comprised of serial resistors and the on resistance of the
switches. CIN is primarily the ADC sampling capacitor and
depending on the input range selected is typically 48 pF in the
0 V to +5 V range, typically 24 pF in the 0 V to +10 V and ±5 V
ranges, and typically 12 pF in the ±10 V range. During the
conversion phase, when the switches are opened, the input
impedance is limited to CPIN.
Because the input impedance of the AD7952 is very high, it
can be directly driven by a low impedance source without gain
error. To further improve the noise filtering achieved by the
AD7952 analog input circuit, an external, 1-pole RC filter
between the amplifier’s outputs and the ADC analog inputs
can be used, as shown in Figure 27. However, large source
impedances significantly affect the ac performance, especially
THD. The maximum source impedance depends on the
amount of THD that can be tolerated. The THD degrades as
a function of the source impedance and the maximum input
frequency.
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