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參數(shù)資料
| 型號： | AD8195ACPZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BUFF HDMI/DVI W/EQUAL 40LFCSP |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 功能： | 開關(guān) |
| 電路： | 1 x 1:1 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 帶卷 (TR) |
AD8195
Data Sheet
Rev. B | Page 16 of 20
07049-
007
0.01F
47k
1k
5V
3.3V
DDC_SCL
DDC_SDA
TMDS
2k
ESD
PROTECTION
(OPTIONAL)
AMUXVCC
AVCC, VTTI,
VTTO
EDID
EEPROM
HDMI
RECEIVER
SCL_OUT
SDA_OUT
SCL_IN
SDA_IN
CEC
MCU
3.3V OR 5V
VREF_OUT
2k
3k
IPA3
INA3
IPA2
INA2
IPA1
INA1
IPA0
INA0
OP3
ON3
OP2
ON2
OP1
ON1
OP0
ON0
CEC_IN
CEC_OUT
AVEE
AD8195
D2+
D2–
D1+
D1–
D0+
D0–
CLK+
CLK–
VREF_IN
AMUXVCC
1F
0.01F
AMUXVCC
CABLE OR PCB
INTERCONNECT
EDID
EEPROM
TYPICAL EDID
PLACEMENT
OPTIONAL EDID
PLACEMENT
HDMI
CONNECTOR
D2+
D2–
D1+
D1–
D0+
D0–
CLK+
CLK–
5V
DDC_SCL
DDC_SDA
CEC
HPD
6k
COMP
10F
Figure 34. AD8195 Typical Application Simplified Schematic
CABLE LENGTHS AND EQUALIZATION
The AD8195 offers 12 dB of equalization for the high speed inputs.
The equalizer of the AD8195 is optimized for video data rates
of 2.25 Gbps and can equalize more than 20 meters of 24 AWG
HDMI cable at the input for 1080p video with deep color.
The length of cable that can be used in a typical HDMI/DVI
application depends on a large number of factors, including the
following:
Cable quality: the quality of the cable in terms of conductor
wire gauge and shielding. Thicker conductors have lower
signal degradation per unit length.
Data rate: the data rate being sent over the cable. The signal
degradation of HDMI cables increases with data rate.
Edge rates: the edge rates of the source input. Slower input
edges result in more significant data eye closure at the end
of a cable.
Receiver sensitivity: the sensitivity of the terminating
receiver.
TMDS OUTPUT RISE/FALL TIMES
The TMDS outputs of the AD8195 are designed for optimal
performance even when external components are connected,
such as external ESD protection, common-mode filters, and
the HDMI connector. In applications where the output of the
AD8195 is connected to an HDMI output connector, additional
ESD protection is recommended. The capacitance of the addi-
tional ESD protection circuits for the TMDS outputs should be
as low as possible. In a typical application, the output rise/fall
times are compliant with the HDMI specification at the output
of the HDMI connector.
PCB LAYOUT GUIDELINES
The AD8195 is used to buffer two distinctly different types of
signals, both of which are required for HDMI and DVI video.
These signal groups require different treatment when laying out
a PCB.
The first group of signals carries the audiovisual (AV) data encoded
by a technique called transition minimized differential signaling
(TMDS) and, in the case of HDMI, is also encrypted according to
the high bandwidth digital copy protection (HDCP) standard.
HDMI/DVI video signals are differential, unidirectional, and
high speed (up to 2.25 Gbps). The channels that carry the video
data must have controlled impedance, be terminated at the
receiver, and be capable of operating up to at least 2.25 Gbps. It
is especially important to note that the differential traces that
carry the TMDS signals should be designed with a controlled
differential impedance of 100 . The AD8195 provides single-
ended 50 terminations on chip for both its inputs and outputs.
Transmitter termination is not fully specified by the HDMI
standard, but its inclusion improves the overall system signal
integrity.
The second group of signals consists of low speed auxiliary control
signals used for communication between a source and a sink.
These signals include the DDC bus (this is an I2C bus used to
send EDID information and HDCP encryption keys between
the source and the sink) and the CEC line. These auxiliary signals
are bidirectional, low speed, and transferred over a single-ended
transmission line that does not need to have controlled impedance.
The primary concern with laying out the auxiliary lines is ensuring
that they conform to the I2C bus standard and do not have
excessive capacitive loading.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8195-EVALZ | 制造商:Analog Devices 功能描述:EVALUATION BOARD - Boxed Product (Development Kits) |
| AD8195XCPZ | 功能描述:IC BUFF HDMI/DVI W/EQUAL 40LFCSP 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):上次購買時間 類型:HDMI/DVI 緩沖器 應(yīng)用:HDTV 安裝類型:表面貼裝 封裝/外殼:40-VFQFN 裸露焊盤，CSP 供應(yīng)商器件封裝:40-LFCSP-VQ（6x6） 標(biāo)準(zhǔn)包裝:1 |
| AD8196 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2:1 HDMI/DVI Switch with Equalization |
| AD8196ACPZ | 功能描述:IC SWITCH DVI/HDMI 2:1 56-LFCSP RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| AD8196ACPZ-R7 | 功能描述:IC SWITCH DVI/HDMI 2:1 56-LFCSP RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
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