參數(shù)資料
型號(hào)： AD8304ARUZ-RL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 3/20頁(yè)
文件大?。?/td> 0K
描述： IC LOGARITHM CONV 160DB 14-TSSOP
設(shè)計(jì)資源： Interfacing ADL5315 to Translinear Logarithmic Amplifier (CN0056)
Interfacing ADL5317 High Side Current Mirror to a Translinear Logarithmic Amplifier in an Avalanche Photodiode Power Detector
標(biāo)準(zhǔn)包裝： 1,000
類型： 對(duì)數(shù)轉(zhuǎn)換器
應(yīng)用： 光纖
安裝類型： 表面貼裝
封裝/外殼： 14-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 14-TSSOP
包裝： 帶卷 (TR)
REV. A
AD8304
–11–
In addition to uses in filter and comparator functions, the buffer
amplifier provides the means to adjust both the slope and inter-
cept, which require a minimal number of external components.
The high input impedance at BFIN, low input offset voltage,
large output swing, and wide bandwidth of this amplifier permit
numerous transformations of the basic VLOG signal, using stan-
dard op amp circuit practices. For example, it has been noted
that to raise the gain of the buffer, and therefore the slope, a
feedback attenuator, RA and RB in Figure 3, should be inserted
between VLOG and the inverting input Pin BFNG.
A wide range of gains may be used and the resistor magnitudes
are not critical; their parallel sum should be about equal to the
net source resistance at the noninverting input. When high gains
are used, the output dynamic range will be reduced; for maxi-
mum swing of 4.8 V, it will amount to simply 4.8 V/VY decades.
Thus, using a ratio of 3 , to set up a slope 30 mV/dB (600 mV/
decade), eight decades can be handled, while with a ratio of 5 ,
which sets up a slope of 50 mV/dB (1 V/decade), the dynamic
range is 4.8 decades, or 96 dB. When using a lower positive
supply voltage, the calculation proceeds in the same way,
remembering to first subtract 0.2 V to allow for 0.1 V upper and
lower headroom in the output swing.
Alteration of the logarithmic intercept is only slightly more tricky.
First note that it will rarely be necessary to lower the intercept
below a value of 100 pA, since this merely raises all output volt-
ages further above ground. However, where this is required, the
first step is to raise the voltage VLOG by connecting a resistor, RZ,
from VLOG to VREF (2 V) as shown in Figure 4.
6
3
4
PDB
BIAS
VREF
10
2
12
VPDB
VSUM
INPT
VSUM
5
1
VNEG
~10k
ACOM
14
VPS2
PWDN
VPS1
VREF
7
VLOG
8
BFIN
9
BFNG
TEMPERATURE
COMPENSATION
5k
11
VOUT
0.5V
IPD
NC
R1
750
10nF
C1
1nF
13
RA
VP
VOUT
NC = NO CONNECT
RB
RZ
Figure 4. Method for Lowering the Intercept
This has the effect of elevating VLOG for small inputs while lower-
ing the slope to some extent because of the shunt effect of RZ
on the 5 k
output resistance. Then, if necessary, the slope may
be increased as before, using a feedback attenuator around the
buffer. Table II lists some examples of lowering the intercept
combined with various slope variations.
Table II. Examples of Lowering the Intercept
VY (mV/decade)
IZ (pA)
RA (k )RB (k )RZ (k )
200
1
20.0
100
25
200
10
10.0
100
50
200
50
3.01
100
165
300
1
10.0
12.4
25
300
10
8.06
12.4
50
300
50
6.65
12.4
165
400
1
11.5
8.2
25
400
10
9.76
8.2
50
400
50
8.66
8.2
165
500
1
16.5
8.2
25
500
10
14.3
8.2
50
500
50
13.0
8.2
165
Equations for use with Table II:
VG V
R
RR
I
V
R
RR
OUT
Y
Z
LOG
PD
Z
REF
LOG
Z
=×
+
×
+×
+
log
10
where
G
R
Rk
A
B
LOG
=+
=
15
and
Generally, it will be useful to raise the intercept. Keep in mind
that this moves the VLOG line in Figure 2 to the right, lowering all
output values. Figure 5 shows how this is achieved. The feedback
resistors, RA and RB, around the buffer are now augmented with
a third resistor, RZ, placed between the Pins BFNG and VREF.
This raises the zero-signal voltage on BFNG, which has the effect
of pushing VOUT lower. Note that the addition of this resistor also
alters the feedback ratio. However, this is readily compensated
in the design of the network. Table III lists the resistor values
for representative intercepts.
Table III. Examples of Raising the Intercept
VY (mV/decade)
IZ (nA)
RA (k )RB (k )RC(k )
300
10
7.5
37.4
24.9
300
100
8.25
130
18.2
400
10
16.5
25.5
400
100
9.76
25.5
16.2
400
500
9.76
36.5
13.3
500
10
12.4
24.9
500
100
12.4
16.5
500
11.5
20.0
12.4
Equations for use with Table III:
VG V
I
V
RR
R
OUT
Y
PD
Z
REF
AB
C
=×
×
+
log
–
10
where
G
R
RR
A
BC
AB
=+
=
×
+
1
and
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