N
參數(shù)資料
型號(hào)： AD8330-EVALZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 17/32頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD8330
標(biāo)準(zhǔn)包裝： 1
每 IC 通道數(shù)： 1 - 單
放大器類(lèi)型： 可變?cè)鲆?br>
輸出類(lèi)型： 差分，滿擺幅
轉(zhuǎn)換速率： 1500 V/µs
-3db帶寬： 150MHz
工作溫度： -40°C ~ 85°C
電流供應(yīng)（主 IC）： 20mA
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 6 V
板類(lèi)型： 完全填充
已供物品： 板
已用 IC / 零件： AD8330
產(chǎn)品目錄頁(yè)面： 775 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： AD8330ACPZ-R7DKR-ND - IC AMP VGA 150MHZ LN LP 16LFCSP
AD8330ACPZ-R2-ND - IC AMP VGA 150MHZ LN LP 16LFCSP
AD8330ACPZ-RL-ND - IC AMP VGA 150MHZ LN LP 16LFCSP
AD8330ACPZ-R7CT-ND - IC AMP VGA 150MHZ LN LP 16LFCSP
AD8330ACPZ-R7TR-ND - IC AMP VGA 150MHZ LN LP 16LFCSP
AD8330ARQZ-RL-ND - IC AMP VGA 150MHZ LN LP 16QSOP
AD8330ARQZ-R7-ND - IC AMP VGA 150MHZ LN LP 16QSOP
AD8330ARQZ-ND - IC AMP VGA 150MHZ LN LP 16QSOP
AD8330
Data Sheet
Rev. F | Page 24 of 32
The noise figure is the decibel representation of the noise factor,
NFAC, commonly defined as follows:
output
at
SNR
input
at
SNR
NFAC =
(20)
However, this is equivalent to
pins
input
the
at
SNR
source
the
at
SNR
=
NFAC
(21)
Let VNSD be the voltage noise spectral density √kTRS due to the
source resistance. Using Equation 17 gives
(
)
{
}
(
)
{
}
NSD
S
IN
NOISE
I
S
I
S
IN
NOISE
IN
NSD
S
I
SIG
FAC
V
R
V
R
V
R
V
N
_
/
=
+
=
(22)
Then, using the result from Equation 19 for a source resistance
of 1 kΩ, having a noise-spectral density of 4.08 nV/√Hz produces
( )
(
)
( )
(
) 79
.
1
Hz
nV/
08
.
4
kΩ
1
Hz
/
nV
3
.
7
kΩ
1
=
FAC
N
(23)
Finally, converting this to decibels using
NFIG = 10 log10(NFAC)
(24)
Thus, the resultant noise figure in this example is 5.06 dB,
which is somewhat lower than the value shown in Figure 53 for
this operating condition.
Noise as a Function of VDBS
The chief consequence of lowering the basic gain using VDBS is
that the current noise spectral density INSD increases with the
square root of the basic gain magnitude, GBN such that
INSD = (3 pA/√Hz)(√GBN)
(25)
Therefore, at the minimum basic gain of ×0, INSD rises to
53.3 pA/√Hz. However, the noise figure rises to 17.2 db if it
is recalculated using the procedures in Equation 16 through
Equation 24.
Distortion Considerations
Continuously variable gain amplifiers invariably employ
nonlinear circuit elements; consequently, it is common for their
distortion to be higher than well-designed fixed gain amplifiers.
The translinear multiplier principles used in the AD8330, in
theory, yield extremely low distortion, a result of the funda-
mental linearization technique that is an inherent aspect of
these circuits.
In practice, however, the effect of device mismatches and junc-
tion resistances in the core cell, and other mechanisms in its
supporting circuitry inevitably cause distortion, further aggravated
by other effects in the later output stages. Some of these effects
are very consistent from one sample to the next, while those due
to mismatches (causing predominantly even-order distortion
components) are quite variable. Where the highest linearity
(and lowest noise) is demanded, consider using one of the X-
AMP products such as the AD603 (single-channel), AD604
(dual-channel), or AD8332 (wideband dual-channel with
ultralow noise LNAs).
P1dB and V1dB
In addition to the nonlinearities that arise within the core of the
AD8330, at moderate output levels, another metric that is more
commonly stated for RF components that deliver appreciable
power to a load is the 1 dB compression point. This is defined
in a very specific manner: it is that point at which, with increasing
output level, the power delivered to the load eventually falls to a
value that is 1 dB lower than it would be for a perfectly linear
system. (Although this metric is sometimes called the 1 dB gain
compression point, it is important to note that this is not the
output level at which the incremental gain has fallen by 1 dB).
As shown in Figure 49, the output of the AD8330 limits quite
abruptly, and the gain drops sharply above the clipping level.
The output power, on the other hand, using an external resistive
load, RL, continues to increase. In the most extreme case, the
waveform changes from the sinusoidal form of the test signal,
with an amplitude just below the clipping level, VCLIP, to a
square wave of precisely the same amplitude. The change in
power over this range is from (VCLIP/√2)2/RL to (VCLIP)2/RL, that
is, a factor of 2, or 3 dB in power terms. It can be shown that for
an ideal limiting amplifier, the 1 dB compression point occurs
for an overdrive factor of 2 dB.
For example, if the AD8330 is driving a 150 Ω load and VMAG is
set to 2 V, the peak output is nominally ±4 V (as noted previously,
the actual value, when loaded. can differ because of a mismatch
between on-chip and external resistors), or 2.83 V rms for a sine
wave output that corresponds to a power of 53.3 mW, that is,
17.3 dBm in 150 Ω. Thus, the P1dB level, at 2 dB above
clipping, is 19.3 dBm.
Though not involving power transfer, it is sometimes useful
to state the V1dB, which is the output voltage (unloaded or
loaded) that is 2 dB above clipping for a sine waveform. In the
above example, this voltage is still 2.83 V rms, which can be
expressed as 9.04 dBV (0 dBV corresponds to a 1 V sine wave).
Thus, the V1dB is at 11.04 dBV.
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