參數(shù)資料
型號: AD9117BCPZ
廠商: Analog Devices Inc
文件頁數(shù): 52/52頁
文件大?。?/td> 0K
描述: IC DAC DUAL 14BIT LO PWR 40LFCSP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
設(shè)計資源: High CMRR Circuit for Converting Wideband Complementary DAC Outputs to Single-Ended Without Precision Resistors (CN0142)
標(biāo)準包裝: 1
系列: TxDAC®
位數(shù): 14
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 232mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 40-LFCSP-VQ(6x6)
包裝: 托盤
輸出數(shù)目和類型: 4 電流,單極
采樣率(每秒): 125M
產(chǎn)品目錄頁面: 785 (CN2011-ZH PDF)
Data Sheet
AD9114/AD9115/AD9116/AD9117
Rev. C | Page 9 of 52
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
Rating
AVDD, DVDDIO, CVDD to AVSS,
DVSS, CVSS
0.3 V to +3.9 V
DVDD to DVSS
0.3 V to +2.1 V
AVSS to DVSS, CVSS
0.3 V to +0.3 V
DVSS to AVSS, CVSS
0.3 V to +0.3 V
CVSS to AVSS, DVSS
0.3 V to +0.3 V
REFIO, FSADJQ, FSADJI, CMLQ,
CMLI to AVSS
0.3 V to AVDD + 0.3 V
QOUTP, QOUTN, IOUTP, IOUTN,
RLQP, RLQN, RLIP, RLIN to AVSS
1.0 V to AVDD + 0.3 V
DBn1 (MSB) to D0 (LSB), CS, SCLK,
SDIO, RESET to DVSS
0.3 V to DVDDIO + 0.3 V
CLKIN to CVSS
0.3 V to CVDD + 0.3 V
Junction Temperature
125°C
Storage Temperature Range
65°C to +150°C
1
n stands for 7 for the AD9114, 9 for the AD9115, 11 for the AD9116, and 13
for the AD9117.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
Table 6.
Package Type
θJA
θJB1
θJC1
Unit
40-Lead LFCSP (with No Airflow
Movement)
29.8
19.0
3.4
°C/W
1
These calculations are intended to represent the thermal performance of the
indicated packages using a JEDEC multilayer test board. Do not assume the
same level of thermal performance in actual applications without a careful
inspection of the conditions in the application to determine that they are
similar to those assumed in these calculations.
ESD CAUTION
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