參數(shù)資料
型號: AD9222ABCPZRL7-50
廠商: Analog Devices Inc
文件頁數(shù): 43/60頁
文件大?。?/td> 0K
描述: IC ADC 12BIT SRL 50MSPS 64LFCSP
標準包裝: 750
位數(shù): 12
采樣率(每秒): 50M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 8
功率耗散(最大): 760mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 16 個單端,單極;8 個差分,單極
AD9222
Data Sheet
Rev. F | Page 48 of 60
CW
AD
833
4
AC
PZ
-R
EEL
INH2
L
MD
2
C
OM
2
X
L
ON
2
L
OP
2
VI
P2
V
IN
2
VPS2
VPS3
V
IN
3
VI
P3
L
OP
3
L
ON
3
C
OM
3
X
L
MD
3
INH3
COM4
INH4
LMD4
COM4X
LON4
LOP4
VIP4
VIN4
VPS4
HILO
M
OD
E
VPS1
VIN1
VIP1
LOP1
LON1
COM1X
LMD1
INH1
COM1
NC
V
OL
2
V
OH
2
COM2
VCM2
COM3
VCM3
V
OL
3
V
OH
3
VCM4
V
OH
4
V
OL
4
V
OL
1
V
OH
1
VCM1
GAIN12
CLMP12
EN12
C
OM
1
2
VPS1
2
C
OM
1
2
EN34
C
OM
3
4
VPS3
4
C
OM
3
4
CLMP34
GAIN34
MO
D
E
Pi
n
P
os
iti
ve
G
ai
n
S
lope
=
0
1.
0V
N
egat
iv
e
G
ai
n
S
lope
=
2.
25
5.
0V
EXT
VG
External
Variable Gain Drive
Variable Gain Circuit
(0
1.0V DC)
H
IL
O
P
in
=H
=+
/
7
5m
V
H
IL
O
P
in
=L
O=
+/
5
0m
V
R
cl
a
mp
Pi
n
EXT
VG
H
IL
O
P
in
=H
=+
/
7
5m
V
H
IL
O
P
in
=L
O=
+/
5
0m
V
R
cl
a
mp
Pi
n
External
Variable Gain Drive
Variable Gain Circuit
(0
1.0V DC)
P
opul
at
e
L605
L620
w
ith
0
res
is
tor
s
or
des
ign
y
our
ow
n
f
il
ter
.
P
ow
er
D
ow
n
E
nabl
e
(0
1V
=D
is
abl
e
P
ow
er
)
D
N
P:
D
O
N
O
T
PO
PU
L
AT
E.
62
61
60
59
58
57
56
55
54
53
52
51
50
49
33
34
35
36
37
38
39
41
42
43
44
45
46
47
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
63
64
48
40
U
601
374
R
620
DNP
R
636
374
R
632
374
R
627
DNP
R
622
0
L619
0
L611
0.
1
F
C
630
0.
1
F
C
629
0.
1
F
C
628
0.
1
F
C
624
0.
1
F
C
623
0.
1
F
C
618
0.
1
F
C
616
10k
R604
0.
1
F
C
60
4
10k
R612
10k
R
62
4
AVDD_5V
AVD
D
_
5
V
AVD
D
_
5
V
AVDD_5V
VG78
0.
1
F
C
617
AVD
D
_
5
V
AVD
D
_
5
V
0.1F
C605
22pF
C603
0.
1
F
C
606
VG56
C612
10F
AVD
D
_
5
V
AVDD_5V
0.1F
C601
187
R613
10k
DNP
R
606
10k
R
601
274
R603
0.018F
C602
1
2
JP6
0
1
L601
120nH
0.
1
F
C
608
0.1F
C609
10k
R605
1000pF
C
607
39k
R
602
C610
10F
AVDD_5V
VG56
GND
R
621
DNP
0
L610
R
616
DNP
C
642
DNP
374
R
615
187
R
618
187
R
614
0.
1
F
C
645
0.
1
F
C
641
0.
1
F
C
640
0
L605
0
L608
0
L607
0
L609
0
L606
0
L612
187
R
619
0.
1
F
C
644
C
646
DNP
C
643
DNP
C
647
DNP
R
617
CH_
G
CH_
H
CH_
H
CH_
G
R
633
DNP
0
L618
R
628
DNP
C
650
DNP
187
R
630
187
R
626
0.
1
F
C
653
0.
1
F
C
649
0.
1
F
C
648
0
L613
0
L616
0
L615
0
L617
0
L614
0
L620
187
R
631
187
R
625
0.
1
F
C
652
C
654
DNP
C
651
DNP
C
655
DNP
R
629
CH_
E
CH_
F
CH_
F
CH_
E
INH8
0.1F
C611
22pF
C614
0.1F
C613
L602
120nH
INH7
274
R607
0.018F
C615
0.
1
F
C
622
22pF
C620
0.1F
C619
L603
120nH
274
R608
C621
INH6
C626
22pF
C625
0.1F
L604
120nH
R609
274
C627
0.018F
INH5
0.1F
C636
10F
C634
C633
10F
10k
DNP
R
610
0.
1
F
C
632
1000pF
C
631
10k
R
634
1
2
JP6
0
2
39k
R
635
AVDD_5V
VG78
GND
10k
R611
AVD
D
_
5
V
10k
R
62
3
AVD
D
_
5
V
C635
05967-077
0.018F
Figure 95. Evaluation Board Schematic, Optional DUT Analog Input Drive (Continued)
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