參數(shù)資料
型號： AD9228ABCPZRL7-65
廠商： Analog Devices Inc
文件頁數(shù)： 45/56頁
文件大?。?/td> 0K
描述： IC ADC 12BIT SPI/SRL 65M 48LFCSP
標準包裝： 750
位數(shù)： 12
采樣率（每秒）： 65M
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
功率耗散（最大）： 510mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 48-LFCSP-VQ（7x7）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 8 個單端，單極；4 個差分，單極
Data Sheet
AD9228
Rev. E | Page 5 of 56
AC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = 0.5 dBFS, unless otherwise noted.
Table 2.
AD9228-40
AD9228-65
Parameter1
Temperature
Min
Typ
Max
Min
Typ
Max
Unit
SIGNAL-TO-NOISE RATIO (SNR)
fIN = 2.4 MHz
Full
70.5
70.2
dB
fIN = 19.7 MHz
Full
68.5
70.2
70.0
dB
fIN = 35 MHz
Full
70.2
68.5
70.0
dB
fIN = 70 MHz
Full
70.0
69.5
dB
SIGNAL-TO-NOISE AND DISTORTION RATIO (SINAD)
fIN = 2.4 MHz
Full
70.3
70.0
dB
fIN = 19.7 MHz
Full
68.0
69.8
70.0
dB
fIN = 35 MHz
Full
69.7
68.0
69.8
dB
fIN = 70 MHz
Full
69.5
69.0
dB
EFFECTIVE NUMBER OF BITS (ENOB)
fIN = 2.4 MHz
Full
11.42
11.37
Bits
fIN = 19.7 MHz
Full
11.1
11.37
11.33
Bits
fIN = 35 MHz
Full
11.37
11.1
11.33
Bits
fIN = 70 MHz
Full
11.33
11.25
Bits
SPURIOUS-FREE DYNAMIC RANGE (SFDR)
fIN = 2.4 MHz
Full
85
dBc
fIN = 19.7 MHz
Full
72
82
85
dBc
fIN = 35 MHz
Full
80
73
84
dBc
fIN = 70 MHz
Full
80
74
dBc
WORST HARMONIC (Second or Third)
fIN = 2.4 MHz
Full
85
dBc
fIN = 19.7 MHz
Full
82
72
85
dBc
fIN = 35 MHz
Full
80
84
73
dBc
fIN = 70 MHz
Full
80
74
dBc
WORST OTHER (Excluding Second or Third)
fIN = 2.4 MHz
Full
90
dBc
fIN = 19.7 MHz
Full
90
80
90
dBc
fIN = 35 MHz
Full
90
79
dBc
fIN = 70 MHz
Full
90
88
dBc
TWO-TONE INTERMODULATION DISTORTION (IMD)—
AIN1 AND AIN2 = 7.0 dBFS
fIN1 = 15 MHz, fIN2 = 16 MHz
25°C
80.8
77.8
dBc
fIN1 = 70 MHz, fIN2 = 71 MHz
25°C
75.0
77.0
dBc
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed.
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