參數(shù)資料
型號(hào): AD9445BSVZ-125
廠商: Analog Devices Inc
文件頁數(shù): 22/40頁
文件大小: 0K
描述: IC ADC 14BIT 125MSPS 100-TQFP
設(shè)計(jì)資源: Using AD8376 to Drive Wide Bandwidth ADCs for High IF AC-Coupled Appls (CN0002)
Using AD8352 as an Ultralow Distortion Differential RF/IF Front End for High Speed ADCs (CN0046)
Using ADL5562 Differential Amplifier to Drive Wide Bandwidth ADCs for High IF AC-Coupled Appls (CN0110)
標(biāo)準(zhǔn)包裝: 1
位數(shù): 14
采樣率(每秒): 125M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 2.6W
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤
輸入數(shù)目和類型: 1 個(gè)差分,單極
AD9445
Rev. 0 | Page 29 of 40
EVALUATION BOARD
Evaluation boards are offered to configure the AD9445 in
either CMOS or LVDS mode only. This design represents a
recommended configuration for using the device over a wide
range of sampling rates and analog input frequencies. These
evaluation boards provide all the support circuitry required to
operate the ADC in its various modes and configurations.
Complete schematics are shown in Figure 67 through Figure 70.
Gerber files are available from engineering applications demon-
strating the proper routing and grounding techniques that should
be applied at the system level.
It is critical that signal sources with very low phase noise
(<60 fsec rms jitter) be used to realize the ultimate performance
of the converter. Proper filtering of the input signal to remove
harmonics and lower the integrated noise at the input is also
necessary to achieve the specified noise performance.
The evaluation boards are shipped with a 115 V ac to 6 V dc
power supply. The evaluation boards include low dropout
regulators to generate the various dc supplies required by the
AD9445 and its support circuitry. Separate power supplies are
provided to isolate the DUT from the support circuitry. Each
input configuration can be selected by proper connection of
various jumpers (see Figure 67).
The LVDS mode evaluation boards include an LVDS-to-CMOS
translator, making them compatible with the high speed ADC
FIFO evaluation kit (HSC-ADC-EVALA-SC). The kit includes a
high speed data capture board that provides a hardware solution
for capturing up to 32 kB samples of high speed ADC output
data in a FIFO memory chip (user upgradeable to 256 kB
samples). Software is provided to enable the user to download
the captured data to a PC via the USB port. This software also
includes a behavioral model of the AD9445 and many other
high speed ADCs.
Behavioral modeling of the AD9445 is also available at
www.analog.com/ADIsimADC. The ADIsimADC software
supports virtual ADC evaluation using ADI proprietary behavioral
modeling technology. This allows rapid comparison between
the AD9445 and other high speed ADCs with or without
hardware evaluation boards.
The user can choose to remove the translator and terminations
to access the LVDS outputs directly.
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