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參數(shù)資料
| 型號(hào)： | AD9516-2BCPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 46/80頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK PLL/VCO 2.2GHZ 64LFCSP |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 類型： | 時(shí)鐘發(fā)生器，扇出配送 |
| PLL： | 是 |
| 輸入： | 時(shí)鐘 |
| 輸出： | CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:14 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 2.33GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 帶卷 (TR) |
| 配用： | AD9516-2/PCBZ-ND - BOARD EVAL FOR AD9516-2 2.2GHZ |
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AD9516-2
Data Sheet
Rev. C | Page 50 of 80
SERIAL CONTROL PORT
The AD9516 serial control port is a flexible, synchronous, serial
communications port that allows an easy interface with many
industry-standard microcontrollers and microprocessors. The
AD9516 serial control port is compatible with most synchronous
transfer formats, including both the Motorola SPI and Intel
SSR protocols. The serial control port allows read/write access
to all registers that configure the AD9516. Single or multiple
byte transfers are supported, as well as MSB first or LSB first
transfer formats. The AD9516 serial control port can be
configured for a single bidirectional I/O pin (SDIO only) or
for two unidirectional I/O pins (SDIO/SDO). By default, the
AD9516 is in bidirectional mode, long instruction (long
instruction is only instruction mode supported).
SERIAL CONTROL PORT PIN DESCRIPTIONS
SCLK (serial clock) is the serial shift clock. This pin is an input.
SCLK is used to synchronize serial control port reads and
writes. Write data bits are registered on the rising edge of this
clock, and read data bits are registered on the falling edge. This
pin is internally pulled down by a 30 k resistor to ground.
SDIO (serial data input/output) is a dual-purpose pin that acts
as either an input only (unidirectional mode) or as both an
input/output (bidirectional mode). The AD9516 defaults to the
bidirectional I/O mode (Register 0x000[0] = 0b).
SDO (serial data out) is used only in the unidirectional I/O
mode (Register 0x000[0] = 1b) as a separate output pin for
reading back data.
CS (chip select bar) is an active low control that gates the read
and write cycles. When CS is high, SDO and SDIO are in a high
impedance state. This pin is internally pulled up by a 30 k
resistor to VS.
AD9516-2
SERIAL
CONTROL
PORT
SCLK
16
CS
17
SDO
21
SDIO
22
06421-
036
Figure 62. Serial Control Port
GENERAL OPERATION OF SERIAL CONTROL PORT
A write or a read operation to the AD9516 is initiated by pulling
CS low.
CS stall high is supported in modes where three or fewer bytes
of data (plus instruction data) are transferred (see Table 47).
In these modes, CS can temporarily return high on any byte
boundary, allowing time for the system controller to process the
next byte. CS can go high on byte boundaries only and can go
high during either part (instruction or data) of the transfer.
During this period, the serial control port state machine enters
a wait state until all data is sent. If the system controller decides
to abort the transfer before all of the data is sent, the state machine
must be reset, either by completing the remaining transfers or
by returning the CS low for at least one complete SCLK cycle
(but less than eight SCLK cycles). Raising the CS on a nonbyte
boundary terminates the serial transfer and flushes the buffer.
In the streaming mode (see Table 47), any number of data bytes
can be transferred in a continuous stream. The register address
is automatically incremented or decremented (see the MSB/LSB
First Transfers section). CS must be raised at the end of the last
byte to be transferred, thereby ending the stream mode.
Communication Cycle—Instruction Plus Data
There are two parts to a communication cycle with the AD9516.
The first part writes a 16-bit instruction word into the AD9516,
coincident with the first 16 SCLK rising edges. The instruction
word provides the AD9516 serial control port with information
regarding the data transfer, which is the second part of the
communication cycle. The instruction word defines whether
the upcoming data transfer is a read or a write, the number of
bytes in the data transfer, and the starting register address for
the first byte of the data transfer.
Write
If the instruction word is for a write operation, the second part
is the transfer of data into the serial control port buffer of the
AD9516. Data bits are registered on the rising edge of SCLK.
The length of the transfer (1, 2, 3 bytes or streaming mode) is
indicated by two bits ([W1:W0]) in the instruction byte. When
the transfer is 1, 2, or 3 bytes, but not streaming, CS can be
raised after each sequence of eight bits to stall the bus (except
after the last byte, where it ends the cycle). When the bus is
stalled, the serial transfer resumes when CS is lowered. Raising CS
on a nonbyte boundary resets the serial control port. During a
write, streaming mode does not skip over reserved or blank
registers; therefore, the user must know the bit pattern to write
to the reserved registers to preserve proper operation of the part.
Refer to the register map (see Table 52) to determine if the default
value for reserved registers is nonzero. It does not matter what data
is written to blank registers.
Because data is written into a serial control port buffer area, and
not directly into the actual control registers of the AD9516, an
additional operation is needed to transfer the serial control port
buffer contents to the actual control registers of the AD9516,
thereby causing them to become active. The update registers
operation consists of setting Register 0x232[0] = 1b (this bit is
self-clearing). Any number of bytes of data can be changed before
executing an update registers. The update registers operation
simultaneously actuates all register changes that have been
written to the buffer since any previous update.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9516-3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Output Clock Generator with Integrated 2.0 GHz VCO |
| AD9516-3/PCBZ | 功能描述:BOARD EVAL FOR AD9516-3 2.0GHZ RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| AD9516-3BCPZ | 功能描述:IC CLOCK PLL/VCO 2GHZ 64LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時(shí)鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| AD9516-3BCPZ-REEL7 | 功能描述:IC CLOCK PLL/VCO 2GHZ 64LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時(shí)鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| AD9516-4 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Output Clock Generator with Integrated 1.6 GHz VCO |
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