- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9091 > AD9551BCPZ-REEL7 (Analog Devices Inc)IC CLOCK GEN TRANSLATOR 40LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD9551BCPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/40頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GEN TRANSLATOR 40LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 時(shí)鐘發(fā)生器 |
| PLL： | 是 |
| 輸入： | 晶體 |
| 輸出： | CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 900MHz |
| 除法器/乘法器： | 無/無 |
| 電源電壓： | 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD9551BCPZ-REEL7DKR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
AD9551
Rev. B | Page 24 of 40
,
re
en in Step 4 applies here,
he constraints for NA
elationship
the previous example
lues of N, Q, and Y constitute the respective input
s
input divider. If FRACx = 0, then the input division factor is
an integer and the SDM is not required (it can be bypassed).
() (
)
The choice of MODx affects the jitter performance of the
input section in a manner similar to the feedback dividers.
However, the spectral spacing of the spurs for the input
SDMs is as follows:
As in Step 4, use long division to convert the fraction, X/Y
to an integer, N, and a proper fraction, R/Y (R and Y a
integers). The same caution giv
regarding the need to use long division rather than a
calculator or a math program.
Given the example of X = 14,867,712 and Y = 616,200,
long division yields the following: N = 24 and R/Y =
78,912/616,200, which reduces to R/Y = 3,288/25,675. The
only caveats are that N must meet t
and NB given in the Output/Input Frequency R
hat Y < 219 (524,288).
section and t
Next, use R and Y to compute the following:
Q
= 2R Y
Using R = 3288 and Y = 25,675 from
yields
Q
= 2 × 3288 25,675 = 19,099
These va
divider values: Nx = 24, FRACx = 19,099, and MODx =
25,675.
In the example, FRACx is nonzero, so the division value i
an integer plus the fractional component, FRACx/MODx.
This implies that the input SDM is necessary as part of the
x
REF
x
FRAC
N
MOD
f
x
+
×
=
Δ
1
2
The input SDMs are similar to the feedback SDM in that it
is desirable to scale MODx and FRACx by the integer part of
219, divided by the value of MODx that was calculated pre-
viously in Step 5. In the example calculation, the value of
MODx is 25,675, which leads to a scale factor of 20 (the integer
part of 219/25,675). A scale factor of 20 yields the following
results: FRACx = 19,099 × 20 = 381,980 and MODx =
25,675×20 = 513,500.
However, these FRACx and MODx values are different from
those that appear in Table 13 (A[3:0] = 0010). The reason is
that a scale factor of 6 (instead of 20) was found to yield the
most acceptable overall performance. A scale factor of 6
6 = 114,594, and MODx = 25,675 × 6 = 154,050.
LOW DROPOUT (LDO) REGULATORS
The AD9551 is powered from a single 3.3 V supply and contains
on-chip LDO regulators for each function to eliminate the need
for external LDOs. To ensure optimal performance, each LDO
output should have a 0.47 μF capacitor connected between its
access pin and ground.
Note that for best performance, the LDO bypass capacitors
must be placed in close proximity to the device.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V110A5H200B2 | CONVERTER MOD DC/DC 5V 200W |
| X9409WV24IT1 | IC XDCP QUAD 64-TAP 10K 24-TSSOP |
| VE-BT4-MV-S | CONVERTER MOD DC/DC 48V 150W |
| CS2100CP-CZZ | IC CLK MULT FRACTIONAL N 10MSOP |
| X9410WV24T1 | IC XDCP DUAL 64-TAP 10K 24-TSSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9552 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Oscillator Frequency Upconverter |
| AD9552/PCBZ | 功能描述:BOARD EVALUATION FOR AD9552 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| AD9552BCPZ | 功能描述:IC PLL CLOCK GEN LP 32LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
| AD9552BCPZ | 制造商:Analog Devices 功能描述:IC PLL CLOCK GENERATOR 112.5MHZ LFCSP-32 |
| AD9552BCPZ-REEL7 | 功能描述:IC PLL CLOCK GEN LP 32LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時(shí)鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。