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參數(shù)資料
| 型號： | AD9575ARUZLVD |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLL CLOCK GEN 25MHZ 16TSSOP |
| 標準包裝： | 96 |
| 系列： | PCI Express® (PCIe) |
| 類型： | 扇出緩沖器（分配），網(wǎng)絡時鐘發(fā)生器 |
| PLL： | 是 |
| 主要目的： | PCI Express（PCIe） |
| 輸入： | 晶體 |
| 輸出： | LVCMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 312.5MHz |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 管件 |
Network Clock Generator, Two Outputs
AD9575
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2010 Analog Devices, Inc. All rights reserved.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2010 Analog Devices, Inc. All rights reserved.
FEATURES
Fully integrated VCO/PLL core
0.39 ps rms jitter from 12 kHz to 20 MHz at 156.25 MHz
0.15 ps rms jitter from 1.875 MHz to 20 MHz at 156.25 MHz
0.40 ps rms jitter from 12 kHz to 20 MHz at 106.25 MHz
0.15 ps rms jitter from 637 kHz to 10 MHz at 106.25 MHz
Input crystal frequency of 19.44 MHz, 25 MHz, or
25.78125 MHz
Pin selectable divide ratios for 33.33 MHz, 62.5 MHz,
100 MHz, 106.25 MHz, 125 MHz, 155.52 MHz, 156.25 MHz,
159.375 MHz, 161.13 MHz, and 312.5 MHz outputs
LVDS/LVPECL/LVCMOS output format
Integrated loop filter
Space saving 4.4 mm × 5.0 mm TSSOP
100 mA power supply current (LVDS output)
120 mA power supply current (LVPECL output)
3.3 V operation
APPLICATIONS
GbE/FC/SONET line cards, switches, and routers
CPU/PCI-E applications
Low jitter, low phase noise clock generation
GENERAL DESCRIPTION
The AD9575 provides a highly integrated, dual output clock
generator function including an on-chip PLL core that is
optimized for network clocking. The integer-N PLL design is
based on the Analog Devices, Inc., proven portfolio of high
performance, low jitter frequency synthesizers to maximize line
card performance. Other applications with demanding phase
noise and jitter requirements also benefit from this part.
The PLL section consists of a low noise phase frequency detector
(PFD), a precision charge pump (CP), a low phase noise voltage
controlled oscillator (VCO), and pin selectable feedback and
output dividers.
By connecting an external crystal, popular network output fre-
quencies can be locked to the input reference. The output divider
and feedback divider ratios are pin programmable for the required
output rates. No external loop filter components are required,
thus conserving valuable design time and board space.
The AD9575 is available in a 16-lead, 4.4 mm × 5.0 mm TSSOP
and can be operated from a single 3.3 V supply. The temperature
range is 40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
VDD × 5
GND × 5
AD9575
XTAL
OSC
VCO
PF
D
/C
P
T
HI
RD-
O
R
DE
R
LP
F
DI
V
IDE
RS
100MHz
TO 312.5MHz
LVDS OR
LVPECL
LVCMOS
33.33MHz/
62.5MHz/SEL1
LDO
08
46
2-
0
01
SEL0
SEL
Figure 1.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
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| AD9575ARUZPEC | 功能描述:IC PLL CLOCK GEN 25MHZ 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:PCI Express® (PCIe) 標準包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應商設備封裝:64-TSSOP 包裝:管件 |
| AD9575-EVALZ-LVD | 制造商:AD 制造商全稱:Analog Devices 功能描述:Network Clock Generator, Two Outputs |
| AD9575-EVALZ-PEC | 制造商:AD 制造商全稱:Analog Devices 功能描述:Network Clock Generator, Two Outputs |
| AD9576/PCBZ | 功能描述:DUAL CHANNEL ASYNCHRONOUS EVALUA 制造商:analog devices inc. 系列:* 零件狀態(tài):有效 標準包裝:1 |
| AD9576BCPZ | 功能描述:DUAL CHANNEL ASYNCHRONOUS CLOCK 制造商:analog devices inc. 系列:* 零件狀態(tài):有效 標準包裝:1 |
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