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參數(shù)資料
| 型號(hào)： | AD9640-125EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/52頁 |
| 文件大小： | 0K |
| 描述： | ADC 14BIT 125MSPS DUAL 64-LFCSP |
| 設(shè)計(jì)資源： | Interfacing ADL5534 to AD9640 High Speed ADC (CN0049) AD9640 Eval Brd Family Gerber Files AD9640 Eval Brd BOM AD9640 Eval Brd Schematic |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 2 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 125M |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | 2 Vpp |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 910mW @ 125MSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD9640 |
| 已供物品： | 板 |
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AD9640
Rev. B | Page 27 of 52
VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD9640.
The input range can be adjusted by varying the reference voltage
applied to the AD9640, using either the internal reference or an
externally applied reference voltage. The input span of the ADC
tracks reference voltage changes linearly. The various reference
modes are summarized in the next few sections. The Reference
Decoupling section describes the best practices PCB layout of
the reference.
Internal Reference Connection
A comparator within the AD9640 detects the potential at the
SENSE pin and configures the reference into four possible
modes, which are summarized in Table 14. If SENSE is grounded,
the reference amplifier switch is connected to the internal
resistor divider (see Figure 51), setting VREF to 1 V. Connecting
the SENSE pin to VREF switches the reference amplifier output
to the SENSE pin, completing the loop and providing a 0.5 V
reference output. If a resistor divider is connected external to
the chip, as shown in Figure 52, the switch again sets to the
SENSE pin. This puts the reference amplifier in a noninverting
mode with the VREF output defined as
+
×
=
R1
R2
VREF
1
5
.
0
The input range of the ADC always equals twice the voltage at
the reference pin for either an internal or an external reference.
VREF
SENSE
0.5V
AD9640
SELECT
LOGIC
0.1F
1.0F
06
54
7-
0
30
VIN–A/VIN–B
VIN+A/VIN+B
ADC
CORE
Figure 51. Internal Reference Configuration
0.5V
AD9640
SELECT
LOGIC
06
54
7-
0
31
VIN–A/VIN–B
VIN+A/VIN+B
ADC
CORE
VREF
SENSE
0.1F
1.0F
R2
R1
Figure 52. Programmable Reference Configuration
If the internal reference of the AD9640 is used to drive multiple
converters to improve gain matching, the loading of the reference
by the other converters must be considered. Figure 53 shows
how the internal reference voltage is affected by loading.
0
–1.25
02
LOAD CURRENT (mA)
RE
F
E
RE
NCE
V
O
L
T
AG
E
RR
O
R
(
%
)
.0
–0.25
–0.50
–0.75
–1.00
0.5
1.0
1.5
VREF = 0.5V
VREF = 1V
06
54
7-
0
80
Figure 53. VREF Accuracy vs. Load
External Reference Operation
The use of an external reference may be necessary to enhance
the gain accuracy of the ADC or improve thermal drift charac-
teristics. Figure 54 shows the typical drift characteristics of the
internal reference in 1 V mode.
Table 14. Reference Configuration Summary
Selected Mode
SENSE Voltage
Resulting VREF (V)
Resulting Differential Span (V p-p)
External Reference
AVDD
N/A
2 × External Reference
Internal Fixed Reference
VREF
0.5
1.0
Programmable Reference
0.2 V to VREF
+
×
R1
R2
1
5
.
0
(see Figure 52)
2 × VREF
Internal Fixed Reference
AGND to 0.2 V
1.0
2.0
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